SLVSAN3B December   2010  – November 2016 TPS61199

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Supply Voltage
      2. 7.3.2 Boost Controller
      3. 7.3.3 Switching Frequency
      4. 7.3.4 Enable and Undervoltage Lockout
      5. 7.3.5 Start-Up
      6. 7.3.6 Unused LED String
      7. 7.3.7 Program LED Full-Scale Current
      8. 7.3.8 PWM Dimming
      9. 7.3.9 Drive High Current LED
    4. 7.4 Device Functional Modes
      1. 7.4.1 Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Schottky Diode
        3. 8.2.2.3 Switch MOSFET and Gate Driver Resistor
        4. 8.2.2.4 Current Sense and Current Sense Filtering
        5. 8.2.2.5 Output Capacitor
        6. 8.2.2.6 Loop Consideration
      3. 8.2.3 Application Curves
      4. 8.2.4 Additional Application Circuits
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Consideration
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Consideration

As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The VDD capacitor, C3 (see Typical Application) is the filter and noise decoupling capacitor for the internal linear regulator powering the internal digital circuits. Place C3 as close as possible between the VDD and GND pins to prevent any noise insertion to digital circuits. The switch node at the drain of Q1 carries high current with fast rising and falling edges. Therefore, the connection between this node to the inductor and the Schottky diode must be kept as short and wide as possible. It is also beneficial to have the ground of the output capacitor C2 close to the GND pin since there is large ground return current flowing between them. When laying out signal grounds, TI recommends using short traces separate from power ground traces, connecting them together at a single point, for example on the thermal pad in the PWP package. Resistors R5, R6, and R7 in Typical Application are LED short-protection threshold current setting and switching frequency programming resistors. To avoid unexpected noise coupling into the pins and affecting the accuracy, these resistors must be close to the pins with short and wide traces to GND. In the PWP package, the thermal pad must be soldered onto the PCB and connected to the GND pin of the device. Additional thermal via can significantly improve power dissipation of the device.

10.2 Layout Example

TPS61199 layout_lvsan3.gif Figure 14. Recommended TPS61199 PCB Layout