SLVSEA0B january   2018  – june 2023 TPS61280D , TPS61280E , TPS61281D

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Description (continued)
  7. 6 Device Comparison Table
  8. 7 Pin Configuration and Functions
  9. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 I2C Interface Timing Characteristics #GUID-BD85FD7C-B9AF-4F5D-9DFF-CD61365A592A/SLVS5401494
    7. 8.7 I2C Timing Diagrams
    8. 8.8 Typical Characteristics
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Voltage Scaling Management (VSEL)
      2. 9.3.2 Spread Spectrum, PWM Frequency Dithering
    4. 9.4 Device Functional Modes
      1. 9.4.1 Power-Save Mode
      2. 9.4.2 Pass-Through Mode
      3. 9.4.3 Mode Selection
      4. 9.4.4 Current Limit Operation
      5. 9.4.5 Start-Up and Shutdown Mode
      6. 9.4.6 Undervoltage Lockout
      7. 9.4.7 Thermal Shutdown
      8. 9.4.8 Fault State and Power-Good
    5. 9.5 Programming
      1. 9.5.1 Serial Interface Description (TPS61280D/E)
      2. 9.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 9.5.3 HS-Mode Protocol
      4. 9.5.4 TPS6128xD/E I2C Update Sequence
    6. 9.6 Register Maps
      1. 9.6.1  Slave Address Byte
      2. 9.6.2  Register Address Byte
      3. 9.6.3  I2C Registers, E2PROM, Write Protect
      4. 9.6.4  E2PROM Configuration Parameters
      5. 9.6.5  CONFIG Register [reset = 0x01]
      6. 9.6.6  VOUTFLOORSET Register [reset = 0x02]
      7. 9.6.7  VOUTROOFSET Register [reset = 0x03]
      8. 9.6.8  ILIMSET Register [reset = 0x04]
      9. 9.6.9  Status Register [reset = 0x05]
      10. 9.6.10 E2PROMCTRL Register [reset = 0xFF]
  11. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 TPS61281D with 2.5V-4.35 VIN, 1500 mA Output Current (TPS61280D with default I2C Configuration)
        1. 10.2.1.1 Design Requirement
        2. 10.2.1.2 Detailed Design Parameters
          1. 10.2.1.2.1 Inductor Selection
          2. 10.2.1.2.2 Output Capacitor
          3. 10.2.1.2.3 Input Capacitor
          4. 10.2.1.2.4 Checking Loop Stability
        3. 10.2.1.3 Application Performance Curves
      2. 10.2.2 TPS61282D with 2.5V-4.35 VIN, 2000 mA Output Current (TPS61280D with I2C Programmable)
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedures
        3. 10.2.2.3 Application Performance Curves
  12. 11Power Supply Recommendations
  13. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Information
  14. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  15. 14Mechanical, Packaging, and Orderable Information
    1. 14.1 Package Summary

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1 Overview

The TPS6128xD/E is a high-efficiency step-up converter featuring pass-through mode optimized to provide low-noise voltage supply for 2G RF power amplifiers (PAs) in mobile phones and/or to pre-regulate voltage for supplying subsystem like eMMC memory, audio codec, LCD bias, antenna switches, RF engine PMIC and so on. It is designed to allow the system to operate at maximum efficiency for a wide range of power consumption levels from a low-, wide- voltage battery cell.

The capability of the TPS6128xD/E to step-up the voltage as well as to pass-through the input battery voltage when its level is high enough allow systems to operate at maximum performance over a wide range of battery voltages, thereby extending the battery life between charging. The device also addresses brownouts caused by the peak currents drawn by the APU and GPU which can cause the battery rail to droop momentarily. Using the TPS6128xD/E device as a pre-regulator eliminates system brownout condition while maintaining a stable supply rail for critical sub-system to function properly.

The TPS6128xD/E synchronous step-up converter typically operates at a quasi-constant 2.3-MHz frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the TPS6128xD/E converter operates in power-save mode with pulse frequency modulation (PFM).

In general, a dc/dc step-up converter can only operate in "true" boost mode, that is the output “boosted” by a certain amount above the input voltage. The TPS6128xD/E device operates differently as it can smoothly transition in and out of zero duty cycle operation. Depending upon the input voltage, output voltage threshold and load current, the integrated bypass switch automatically transitions the converter into pass-through mode to maintain low-dropout and high-efficiency. The device exits pass-through mode (0% duty cycle operation) if the total dropout resistance in bypass mode is insufficient to maintain the output voltage at it's nominal level. Refer to the typical characteristics section (DC Output Voltage vs. Input Voltage) for further details.

During PWM operation, the converter uses a novel quasi-constant on-time valley current mode control scheme to achieve excellent line/load regulation and allows the use of a small ceramic inductor and capacitors. Based on the VIN/VOUT ratio, a simple circuit predicts the required on-time. At the beginning of the switching cycle, the low-side N-MOS switch is turned-on and the inductor current ramps up to a peak current that is defined by the on-time and the inductance. In the second phase, once the on-timer has expired, the rectifier is turned-on and the inductor current decays to a preset valley current threshold. Finally, the switching cycle repeats by setting the on timer again and activating the low-side N-MOS switch.

The current mode architecture provides excellent transient load response, requiring minimal output filtering. Internal soft-start and loop compensation simplifies the design process while minimizing the number of external components.

The TPS6128xD/E directly and accurately controls the average input current through intelligent adjustment of the valley current limit, allowing an accuracy of ±17.5%. Together with an external bulk capacitor, the TPS6128xD/E allows an application to be interfaced directly to its load, without overloading the input source due to appropriate set average input current limit. An open-drain output (PG or GPIO/nFAULT) provides a signal to issue an interrupt to the system if any fault is detected on the device (thermal shutdown, output voltage out-of limits, and so on).

The output voltage can be dynamically adjusted between two values (floor and roof voltages) by toggling a logic control input (VSEL) without the need for external feedback resistors. This features can either be used to raise the output voltage in anticipation of a positive load transient or to dynamically change the PA supply voltage depending on its mode of operation and/or transmitting power.

The TPS61280D integrates an I2C compatible interface allowing transfers up to 3.4Mbps. This communication interface can be used to set the output voltage threshold at which the converter transitions between boost and pass-through mode, for reprogramming the mode of operation (PFM/PWM or forced PWM), for settings the average input current limit or resetting the output voltage for instance.

Configuration parameters can be changed by writing the desired values to the appropriate I2C register(s). The I2C registers are volatile and their contents are lost when power is removed from the device. By writing to the Section 9.6.10, it is possible to store the active configuration in non-volatile E2PROM; during power-up, the contents of the E2PROM are copied into the I2C registers and used to configure the device.