SLVSHJ8 February 2024 TPS61299-Q1
PRODUCTION DATA
PARAMETER | Version | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|---|
POWER SUPPLY | |||||||
VIN | Input voltage range | All | 0.5 | 5.5 | V | ||
VIN_UVLO | Under-voltage lockout threshold | All | VIN rising | 0.7 | V | ||
VIN_UVLO | Under-voltage lockout threshold | All | VIN falling | 0.5 | V | ||
IQ | Quiescent current into VIN pin | All | IC enabled, No load, No switching, TJ up to 85°C | 0.5 | nA | ||
IQ | Quiescent current into VOUT pin | All | IC enabled, No load, No switching, TJ up to 85°C | 95 | 300 | nA | |
ISD | Shutdown current into VIN pin | All | EN = LOW, VIN = 3.6V, VOUT = 0V | 60 | nA | ||
ILKG_SW | Leakage current into SW pin (from SW pin to VOUT pin) | All | VSW = 3.0V, VOUT = 0V, TJ = 25°C | 1 | 4 | nA | |
ILKG_SW | Leakage current into SW pin (from SW pin to VOUT pin) | All | VSW = 3.0V, VOUT = 0V, TJ = 85°C | 1 | nA | ||
ILKG_SW | Leakage current into SW pin (from SW pin to GND pin) | All | VSW = 3.0V, VOUT = 0V, TJ = 25°C | 1 | 15 | nA | |
ILKG_SW | Leakage current into SW pin (from SW pin to GND pin) | All | VSW = 3.0V, VOUT = 0V, TJ up to 85°C | 1 | 200 | nA | |
OUTPUT | |||||||
VOUT | Output voltage setting range | All | 1.8 | 5.5 | V | ||
VOUT_PWM_ACY | Output voltage accuracy | All | PWM, PFM mode | -2 | 2 | % | |
VOUT_SNOOZE_ACY | Output voltage accuracy | All | normal mode | VOUT_PWM_ACY+37.5mV | V | ||
fast mode | VOUT_PWM_ACY+15mV | V | |||||
POWER SWITCH | |||||||
RDS(on) | High-side MOSFET on resistance | All | VOUT = 5.0V | 150 | mΩ | ||
RDS(on) | Low-side MOSFET on resistance | All | VOUT = 5.0V | 88 | mΩ | ||
ILIM | Input current limit | TPS61299Q | VIN = 3.6V, VOUT = 5.0V | 0.96 | 1.2 | 1.44 | A |
ILH | Inductor current ripple | TPS61299Q | PWM | 350 | mA | ||
APPLICATION | |||||||
LOGIC INTERFACE | |||||||
VEN_H | EN logic high threshold | All | VIN >= 1.05V | 0.84 | V | ||
VEN_L | EN logic low threshold | All | VIN >= 1.05V | 0.36 | V | ||
VEN_H | EN logic high threshold | All | VIN < 1.05V | 0.8*VIN | V | ||
VEN_L | EN logic low threshold | All | VIN < 1.05V | 0.2*VIN | V | ||
IEN_LKG | Leakage current into EN pin | All | VEN=5V | 1 | 50 | nA | |
REN | EN pin pulldown resistor | All | EN=low | 800 | kΩ | ||
PROTECTION | |||||||
TSD | Thermal shutdown threshold | TJ rising | 150 | °C | |||
TSD_HYS | Thermal shutdown hysteresis | TJ falling below TSD | 20 | °C |