SLVS893F December 2008 – May 2019 TPS61500
PRODUCTION DATA.
When capacitor C5 is connected to the DIMC pin, the FB regulation voltage is scaled proportional to the external PWM signal's duty cycle; therefore, it achieves LED brightness change, shown in Figure 7. The relationship between the duty cycle and LED current is given by Equation 1:
where
The device chops up the internal 200-mV reference voltage at the duty cycle of the PWM signal. The pulsed reference voltage is then filtered by a low pass filter that is composed of an internal 25-kΩ resistor and the external capacitor C5. The output of the filter is connected to the error amplifier as the reference voltage for the FB pin. Therefore, although a PWM signal is used for brightness dimming, only the LED DC current is modulated. This eliminates the audible noise that often occurs when the LED current is pulsed during PWM dimming. Unlike other methods for filtering the PWM signal, the device analog dimming method is independent of the PWM logic voltage level which often has large variations.
For optimum performance, TI recommends that the value of C5 be as large as possible to provide adequate filtering for the PWM frequency. For example, when the PWM frequency is 5-kHz, C5 equal to 1 μF is sufficient. The recommended minimum PWM on time at start-up is 200 µs. After start-up, TI recommends a minimum PWM duty cycle of 1%.