SLVSAW2C March   2012  – October 2016 TPS62090 , TPS62091 , TPS62092 , TPS62093

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Enable and Disable (EN)
      2. 8.3.2  Softstart (SS) and Hiccup Current Limit During Startup
      3. 8.3.3  Voltage Tracking (SS)
      4. 8.3.4  Short Circuit Protection (Hiccup-Mode)
      5. 8.3.5  Output Discharge Function
      6. 8.3.6  Power Good Output (PG)
      7. 8.3.7  Frequency Set Pin (FREQ)
      8. 8.3.8  Undervoltage Lockout (UVLO)
      9. 8.3.9  Thermal Shutdown
      10. 8.3.10 Charge Pump (CP, CN)
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation Operation
      2. 8.4.2 Power Save Mode Operation
      3. 8.4.3 Low Dropout Operation (100% Duty Cycle)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Input and Output Capacitor Selection
        3. 9.2.2.3 Setting the Output Voltage
        4. 9.2.2.4 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guideline
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings(1)

Over operating free-air temperature range (unless otherwise noted)
VALUE UNIT
MIN MAX
Voltage range(2) PVIN, AVIN, FB, SS, EN, FREQ, VOS –0.3 7 V
SW, PG –0.3 VIN + 0.3
CN, CP -0.3 VIN + 7.0
Power Good sink current PG 1 mA
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground pin.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM) per ANSI/ESDA/JEDEC JS-001, all pins (1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins (2) ±500 V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions(1)

MIN TYP MAX UNIT
VIN Input voltage range VIN 2.5 6 V
TA Operating ambient temperature –40 85 °C
TJ Operating junction temperature –40 125 °C
(1) See the application section for further information

7.4 Thermal Information

THERMAL METRIC(1) TPS6209x UNIT
QFN (16 PINS)
RθJA Junction-to-ambient thermal resistance 47 °C/W
RθJCtop Junction-to-case (top) thermal resistance 60 °C/W
RθJB Junction-to-board thermal resistance 20 °C/W
ψJT Junction-to-top characterization parameter 1.5 °C/W
ψJB Junction-to-board characterization parameter 20 °C/W
RθJCbot Junction-to-case (bottom) thermal resistance 5.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report (SPRA953).

7.5 Electrical Characteristics

VIN = 3.6 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VIN Input voltage range 2.5 6 V
IQIN Quiescent current Not switching, FB = FB +5%, into PVIN and AVIN 20 µA
Isd Shutdown current Into PVIN and AVIN 0.6 5 µA
UVLO Undervoltage lockout threshold VIN falling 2.1 2.2 2.3 V
Undervoltage lockout hysteresis 200 mV
Thermal shutdown Temperature rising 150 ºC
Thermal shutdown hysteresis 20 ºC
Control SIGNALS EN, FREQ
VH High level input voltage VIN = 2.5 V to 6 V 1 0.65 V
VL Low level input voltage VIN = 2.5 V to 6 V 0.6 0.4 V
Ilkg Input leakage current EN, FREQ = GND or VIN 10 100 nA
RPD Pull down resistance 400 kΩ
Softstart
ISS Softstart current 6.3 7.5 8.7 µA
POWER GOOD
Vth Power good threshold Output voltage rising 93% 95% 97%
Output voltage falling 88% 90% 92%
VL Low level voltage I(sink) = 1 mA 0.4 V
IPG PG sinking current 1 mA
Ilkg Leakage current VPG = 3.6 V 10 100 nA
POWER SWITCH
RDS(on) High side FET on-resistance ISW = 500 mA 50 mΩ
Low side FET on-resistance ISW = 500 mA 40 mΩ
ILIM High side FET switch current limit 3.7 4.6 5.5 A
fs Switching frequency FREQ = GND, IOUT = 3 A 2.8 MHz
FREQ = VIN, IOUT = 3 A 1.4 MHz
OUTPUT
Vs Output voltage range 0.8 VIN V
Rod Output discharge resistor EN = GND, VOUT = 1.8 V 200 Ω
VFB Feedback regulation voltage 0.8 V
VFB Feedback voltage
accuracy(1) (2)(3) 		VIN ≥ VOUT + 1 V, TPS62090 adjustable output version
IOUT = 1 A, PWM mode, TJ = 25°C -1% +1%
IOUT = 1 A, PWM mode -1.4% +1.4%
IOUT = 0 mA, FREQ = 2.8 MHz, VOUT ≥ 0.8 V, PFM mode -1.4% +3%
IOUT = 0 mA, FREQ = 1.4 MHz, VOUT ≥ 1.2 V, PFM mode -1.4% +3%
IOUT = 0 mA, FREQ = 1.4 MHz, VOUT < 1.2V, PFM mode -1.4% +3.7%
IFB Feedback input bias current VFB = 0.8 V, TPS62090 adjustable output version 10 100 nA
VOUT Output voltage accuracy (2)(3) VIN ≥ VOUT + 1 V, fixed output voltage
IOUT = 1 A, PWM mode -1.4% +1.4%
IOUT = 0 mA, FREQ = High and Low, PFM mode -1.4% +2.5%
Line regulation VOUT = 1.8 V, PWM operation 0.016 %/V
Load regulation VOUT = 1.8 V, PWM operation 0.04 %/A
(1) For output voltages < 1.2 V, use a 2 x 22 µF output capacitance to achieve +3% output voltage accuracy.
(2) Conditions: f = 2.8 MHz, L = 0.47 µH, COUT = 22 µF or f = 1.4 MHz, L = 1 µH, COUT = 22 µF.
(3) For more information, see the Power Save Mode Operation section of this data sheet.

7.6 Typical Characteristics

TPS62090 TPS62091 TPS62092 TPS62093 C001_SLVSAW2.png
Figure 1. High Side FET On-Resistance vs Input Voltage
TPS62090 TPS62091 TPS62092 TPS62093 G010_SLVSAW2.png
Figure 3. Switching Frequency vs Input Voltage
TPS62090 TPS62091 TPS62092 TPS62093 G027_SLVSAW2.png
Figure 5. Frequency vs Input Voltage
TPS62090 TPS62091 TPS62092 TPS62093 G009_SLVSAW2.gif
VOUT = 1.8 V L = 1 µH f = 1.4 MHz
Figure 2. Switching Frequency vs Load Current
TPS62090 TPS62091 TPS62092 TPS62093 G026_SLVSAW2.gif
VOUT = 1.8 V L = 0.4 µH f = 2.8 MHz
Figure 4. Frequency vs Load Current
TPS62090 TPS62091 TPS62092 TPS62093 G011_SLVSAW2.png
Figure 6. Quiescent Current vs Input Voltage