The TPS62095 device is a high frequency synchronous step down converter optimized for small solution size, high efficiency and suitable for battery powered applications. To maximize efficiency, the converter operates in PWM mode with a nominal switching frequency of 1.4MHz and automatically enters Power Save Mode operation at light load currents. When used in distributed power supplies and point of load regulation, the device allows voltage tracking to other voltage rails and tolerates output capacitors up to 150µF and beyond. Using the DCS-Control™ topology, the device achieves excellent load transient performance and accurate output voltage regulation.
The output voltage startup ramp is controlled by the soft startup pin, which allows operation as either a standalone power supply or in tracking configurations. Power sequencing is also possible by configuring the EN and PG pins. In Power Save Mode, the device operates with typically 20µA quiescent current. Power Save Mode is entered automatically and seamlessly maintaining high efficiency over the entire load current range.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS62095 | VQFN (16) | 3.00 mm × 3.00 mm |
Changes from * Revision (April 2014) to A Revision
PIN | DESCRIPTION | |
---|---|---|
NAME | NO. | |
SW | 1, 2 | Switch pin of the power stage. |
DEF | 3 | This pin is used for internal logic and needs to be pulled high. This pin must be connected to the AVIN pin. |
PG | 4 | Power good open drain output. A pull up resistor can not be connected to any voltage higher than the input voltage. |
FB | 5 | Feedback pin, for regulating the output voltage. |
AGND | 6 | Analog ground. |
CP | 7 | Internal charge pump's flying capacitor. Connect a 10nF capacitor between CP and CN. |
CN | 8 | Internal charge pump's flying capacitor. Connect a 10nF capacitor between CP and CN. |
SS | 9 | Soft-start control pin. A capacitor is connected to this pin and sets the soft startup time. Leaving this pin floating sets the minimum start-up time. |
AVIN | 10 | Analog supply input voltage pin. |
PVIN | 11,12 | Power supply input voltage pin. |
EN | 13 | Enable pin. This pin has an active pull down resistor of typically 400kΩ. |
PGND | 14,15 | Power ground. |
VOS | 16 | Output voltage sense pin. This pin must be directly connected to the output voltage. |
Thermal Pad | The exposed thermal pad must be connected to AGND. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage at pins(2) | PVIN, AVIN, FB, SS, EN, DEF, VOS | -0.3 | 7.0 | V |
SW, PG | -0.3 | VIN+0.3 | ||
Sink current | PG | 1.0 | mA | |
Operating junction temperature | -40 | 150 | °C |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
Tstg | Storage temperature range | –65 | 150 | °C | |
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | 0 | 2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | 0 | 500 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN | Input voltage range | 2.5 | 5.5 | V |
VPG | Power good pull-up resistor voltage | VIN | V | |
VOUT | Output voltage range | 0.8 | VIN | V |
IOUT | Output current range | 0 | 4.0 | A |
TJ | Operating junction temperature | -40 | 125 | °C |
THERMAL METRIC(1) | RGT (16 PINS) | UNIT | |
---|---|---|---|
RθJA | Junction-to-ambient thermal resistance | 47 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 60 | |
RθJB | Junction-to-board thermal resistance | 20 | |
ψJT | Junction-to-top characterization parameter | 1.5 | |
ψJB | Junction-to-board characterization parameter | 20 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 5.3 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY | ||||||
VIN | Input voltage range | 2.5 | 5.5 | V | ||
IQIN | Quiescent current | Not switching, No Load, Into PVIN and AVIN | 20 | µA | ||
Isd | Shutdown current | Into PVIN and AVIN | 0.6 | 5 | µA | |
UVLO | Undervoltage lockout threshold | VIN falling | 2.1 | 2.2 | 2.3 | V |
Undervoltage lockout hysteresis | 200 | mV | ||||
Thermal shutdown | Temperature rising | 150 | ºC | |||
Thermal shutdown hysteresis | 20 | ºC | ||||
CONTROL SIGNAL EN | ||||||
VH | High level input voltage | VIN = 2.5 V to 5.5 V | 1 | V | ||
VL | Low level input voltage | VIN = 2.5 V to 5.5 V | 0.4 | V | ||
Ilkg | Input leakage current | EN = VIN | 10 | 100 | nA | |
RPD | Pull down resistance | EN = Low | 400 | kΩ | ||
SOFT STARTUP | ||||||
ISS | Softstart current | 6.3 | 7.5 | 8.7 | µA | |
POWER GOOD | ||||||
Vth | Power good threshold | Output voltage rising | 93% | 95% | 97% | |
Output voltage falling | 88% | 90% | 92% | |||
VL | Low level voltage | I(sink) = 1 mA | 0.4 | V | ||
Ilkg | Leakage current | VPG = 3.6 V | 10 | 100 | nA | |
POWER SWITCH | ||||||
RDS(on) | High side FET on-resistance | ISW = 500 mA | 50 | mΩ | ||
Low side FET on-resistance | ISW = 500 mA | 40 | mΩ | |||
ILIM | High side FET switch current limit | 4.7 | 5.5 | 6.7 | A | |
fSW | Switching frequency | IOUT = 3 A | 1.4 | MHz | ||
OUTPUT | ||||||
VOUT | Output voltage range | 0.8 | VIN | V | ||
RDIS | Output discharge resistor | EN = GND, VOUT = 1.8 V | 200 | Ω | ||
VFB | Feedback regulation voltage | 0.8 | V | |||
Feedback voltage accuracy (1) | IOUT = 1 A, PWM mode | -1.4% | +1.4% | |||
IOUT = 1 mA, PFM mode, VOUT ≥ 1.8 V | -1.4% | +2.0% | ||||
IOUT = 1 mA, PFM mode, VOUT < 1.8 V | -1.4% | +2.5% | ||||
IFB | Feedback input bias current | VFB = 0.8 V | 10 | 100 | nA | |
Line regulation | VOUT = 1.8 V, PWM operation | 0.016 | %/V | |||
Load regulation | VOUT = 1.8 V, PWM operation | 0.04 | %/A |
The TPS62095 synchronous step down converter is based on DCS-Control™ (Direct Control with Seamless transition into Power Save Mode). This is an advanced regulation topology that combines the advantages of hysteretic and voltage mode control.
The DCS-Control™ topology operates in PWM (Pulse Width Modulation) mode for medium to heavy load conditions and in Power Save Mode at light load currents. In PWM, the converter operates with its nominal switching frequency of 1.4 MHz having a controlled frequency variation over the input voltage range. As the load current decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC's quiescent current to achieve high efficiency over the entire load current range. DCS-Control™ supports both operation modes using a single building block and therefore has a seamless transition from PWM to Power Save Mode without effects on the output voltage. The TPS62095 offers excellent DC voltage regulation and load transient regulation, combined with low output voltage ripple, minimizing interference with RF circuits.
In PWM mode, the device operates with a fixed ON-time switching pulse at medium to heavy load currents. A quasi fixed switching frequency of typical 1.4MHz over the input and output voltage range is achieved by using an input feed forward. The ON-time is calculated as shown in Equation 2. As the load current decreases, the converter enters Power Save Mode operation reducing its switching frequency. The device enters Power Save Mode at the boundary to discontinuous conduction mode (DCM).
The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode the high side MOSFET switch is constantly turned on. This is particularly useful in battery powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage where the output voltage falls below set point is given by:
Where
RDS(on) = High side FET on-resistance
RL = DC resistance of the inductor
VOUT(min) = Minimum output voltage the load can accept
As the load current decreases, the converter enters Power Save Mode operation. During Power Save Mode, the converter operates with reduced switching frequency and with a minimum quiescent current to maintain high efficiency. The Power Save Mode is based on a fixed on-time architecture following Equation 2.
In Power Save Mode, the output voltage rises slightly above the nominal output voltage in PWM mode. This effect is reduced by increasing the output capacitance or the inductor value. This effect is also reduced by programming the output voltage of the TPS62095 lower than the target value. As an example, if the target output voltage is 3.3V, then the TPS62095 can be programmed to 3.3V - 0.3%. As a result, the output voltage accuracy is now -1.7% to +1.7% instead of -1.4% to 2%. The output voltage accuracy in PFM operation is reflected in the electrical specification table and given for a 2 x 22µF output capacitance.
To minimize inrush current during startup, the device has an adjustable startup time depending on the capacitor value connected to the SS pin. The device charges the SS capacitor with a constant current of typically 7.5µA. The feedback voltage follows this voltage divided by 1.56, until the internal reference voltage of 0.8V is reached. The soft startup operation is completed once the voltage at the SS capacitor has reached typically 1.25V. The soft startup time is calculated using Equation 3. The larger the SS capacitor, the longer the soft startup time. The relation between the SS pin voltage and the FB pin voltage is estimated using Equation 4. Leaving the SS pin floating sets the minimum startup time.
During startup the switch current limit is reduced to 1/3 of its typical current limit of 5.5A when the output voltage is less than 0.6V. Once the output voltage exceeds typically 0.6V, the switch current limit is released to its nominal value. Thus, the device provides a reduced load current of 1.8A when the output voltage is below 0.6V. A small or no soft startup time may trigger this reduced switch current limit during startup, especially for larger output capacitor applications. This is avoided by using a larger soft start up capacitance which extends the soft startup time. See Short Circuit Protection (Hiccup-Mode) for details of the reduced current limit during startup.
The SS pin can also be used to implement output voltage tracking with other supply rails, as shown in Figure 5.
In voltage tracking applications, the resistance R4 should be set properly to achieve accurate voltage tracking by taking 7.5μA soft startup current into account. 4.3kΩ is a sufficient value for R4. The relationship between V1 and V2 is shown in Equation 5. To achieve V1 startup leading V2, as shown in Figure 6, Equation 5 should be less than 1. To achieve simultaneous tracking, Equation 5 should equal to 1.
The device is protected against hard short circuits to GND and over-current events. This is implemented by a two level short circuit protection. During start-up and when the output is shorted to GND, the switch current limit is reduced to 1/3 of its typical current limit of 5.5A. Once the output voltage exceeds typically 0.6V the current limit is released to its nominal value. The full current limit is implemented as a hiccup current limit. Once the internal current limit is triggered 32 times, the device stops switching and starts a new start-up sequence after a typical delay time of 66µS passed by. The device repeats these cycles until the high current condition is released.
To make sure the device starts up under defined conditions, the output gets discharged via the VOS pin with a typical discharge resistor of 200Ω whenever the device shuts down. This happens when the device is disabled or if thermal shutdown, undervoltage lockout or short circuit hiccup-mode is triggered.
The power good output is low when the output voltage is below its nominal value. The power good becomes high impedance once the output is within 5% of regulation. The PG pin is an open drain output and is specified to sink up to 1mA. This output requires a pull-up resistor to be monitored properly. The pull-up resistor cannot be connected to any voltage higher than the input voltage of the device.
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is included. UVLO shuts down the device at input voltages lower than typically 2.2V with a 200mV hysteresis.
The device goes into thermal shutdown once the junction temperature exceeds typically 150°C with a 20°C hysteresis.