SLVSDZ7A
September 2017 – December 2017
TPS62097-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
1.8-V Output, Typical Application
1.8-V Output, Efficiency, MODE = Open
4
Revision History
5
Terminal Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommend Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
100% Duty Cycle Mode
7.3.2
Switch Current Limit and Hiccup Short Circuit Protection
7.3.3
Under Voltage Lockout (UVLO)
7.3.4
Thermal Shutdown
7.4
Device Function Modes
7.4.1
Enable and Disable (EN)
7.4.2
Power Save Mode and Forced PWM Mode (MODE)
7.4.3
Soft Startup (SS/TR)
7.4.4
Voltage Tracking (SS/TR)
7.4.5
Power Good (PG)
8
Application Information
8.1
Application Information
8.2
1.8-V Output Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Setting the Output Voltage
8.2.2.2
Output Filter Design
8.2.2.3
Inductor Selection
8.2.2.4
Capacitor Selection
8.2.3
Application Performance Curves
9
Power Supply Recommendations
10
PCB Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Thermal Information
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Community Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGT|16
MPQF119H
Thermal pad, mechanical data (Package|Pins)
RGT|16
QFND571B
Orderable Information
slvsdz7a_oa
slvsdz7a_pm
6.6
Typical Characteristics
Figure 1.
High-Side FET On-Resistance
Figure 2.
Low-Side FET On-Resistance