SLVS585E July   2005  – June 2015 TPS62110 , TPS62111 , TPS62112 , TPS62113

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable
      2. 9.3.2 Low-Battery Detector (Standard Version)
      3. 9.3.3 Enable/Low-Battery Detector - Enhanced Version (TPS62113 Only)
      4. 9.3.4 Power Good Comparator
      5. 9.3.5 Undervoltage Lockout
      6. 9.3.6 Synchronization
      7. 9.3.7 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Soft Start
      2. 9.4.2 Constant-Frequency Mode of Operation (Sync = High)
      3. 9.4.3 Power Save Mode of Operation (Sync = Low)
      4. 9.4.4 100% Duty-Cycle, Low-Dropout Operation
      5. 9.4.5 No-Load Operation
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Applications
      1. 10.2.1 Standard Connection for Adjustable Version
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 External Component Selection
          2. 10.2.1.2.2 Inductor Selection
          3. 10.2.1.2.3 Output Capacitor Selection
          4. 10.2.1.2.4 Input Capacitor Selection
          5. 10.2.1.2.5 Feedforward Capacitor Selection
          6. 10.2.1.2.6 Recommended Capacitors
        3. 10.2.1.3 Application Curves
      2. 10.2.2 Standard Connection for Fixed-Voltage Version
        1. 10.2.2.1 Design Requirements
        2. 10.2.2.2 Detailed Design Procedure
        3. 10.2.2.3 Application Curves
    3. 10.3 System Examples
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Related Links
    3. 13.3 Community Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

A proper layout is critical for the operation of a switched-mode power supply (SMPS), even more at high switching frequencies. Therefore, the PCB layout of the TPS6211x devices demands careful attention to ensure operation and to get the performance specified. A poor layout can lead to issues like poor regulation (both line and load), stability and accuracy weaknesses, increased EMI radiation, and noise sensitivity.

Provide low inductive and resistive paths for loops with high di/dt. Therefore, paths conducting the switched load current should be as short and wide as possible. The input and output capacitance should be placed as close as possible to the IC pins and parallel wiring over long distances as well as narrow traces should be avoided. Provide low capacitive paths (with respect to all other nodes) for wires with high dv/dt. Therefore, keep the SW node small. Loops which conduct an alternating current should outline an area as small as possible, as this area is proportional to the energy radiated.

Sensitive nodes like FB and LBI need to be connected with short wires and not nearby high dv/dt signals (that is, SW). The FB resistors, R1 and R2, and LBI resistors, R5 and R6, should be kept close to the IC and connect directly to those pins and AGND. The 1-µF capacitor on VINA should connect directly from VINA to AGND.

All grounds (GND, AGND, and PGND) are directly connected to the exposed thermal pad. The exposed thermal pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation.

See Figure 22 for the recommended layout of the TPS6211x.

12.2 Layout Example

TPS62110 TPS62111 TPS62112 TPS62113 layout_lvs585.gifFigure 22. Recommended Layout