SLVSDR8B April   2018  – February 2023 TPS62147 , TPS62148

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Schematic
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable
      2. 9.3.2 Power Good (PG)
      3. 9.3.3 MODE
      4. 9.3.4 Undervoltage Lockout (UVLO)
      5. 9.3.5 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PWM/PFM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit And Short Circuit Protection (for TPS62148)
      5. 9.4.5 HICCUP Current Limit And Short Circuit Protection (for TPS62147)
      6. 9.4.6 Soft Start / Tracking (SS/TR)
      7. 9.4.7 Output Discharge Function (TPS62148 only)
      8. 9.4.8 Starting into a Pre-Biased Load
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Programming the Output Voltage
      2. 10.1.2 External Component Selection
      3. 10.1.3 Inductor Selection
      4. 10.1.4 Capacitor Selection
        1. 10.1.4.1 Output Capacitor
        2. 10.1.4.2 Input Capacitor
        3. 10.1.4.3 Soft-Start Capacitor
      5. 10.1.5 Tracking Function
      6. 10.1.6 Output Filter and Loop Stability
    2. 10.2 Typical Applications
      1. 10.2.1 Typical Application with Adjustable Output Voltage
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
        3. 10.2.1.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 LED Power Supply
      2. 10.3.2 Powering Multiple Loads
      3. 10.3.3 Voltage Tracking
      4. 10.3.4 Precise Soft-Start Timing
    4. 10.4 Power Supply Recommendations
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
      3. 10.5.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.2 Power Save Mode Operation (PWM/PFM)

When the MODE pin is low, Power Save Mode is allowed. The device operates in PWM mode as long the output current is higher than half the inductor ripple current. To maintain high efficiency at light loads, the device enters Power Save Mode at the boundary to discontinuous conduction mode (DCM). This happens if the output current becomes smaller than half the inductor ripple current. For improved transient response, PWM mode is forced for 8 switching cycles if the output voltage is above target due to a load release. The Power Save Mode is entered seamlessly, if the load current decreases and the MODE pin is set low. This ensures a high efficiency in light load operation. The device remains in Power Save Mode as long as the inductor current is discontinuous.

In Power Save Mode the switching frequency decreases linearly with the load current maintaining high efficiency. The transition into and out of Power Save Mode is seamless in both directions.

The AEE function in TPS62147, TPS62148 adjusts the on-time (TON) in power save mode depending on the input voltage and the output voltage to maintain highest efficiency. The on-time, in steady-state operation, can be estimated as follows.

For FSEL = high (2.5MHz):

Equation 3. GUID-1183D907-685A-4D08-98AE-EBCA64BCB4CC-low.gif

For FSEL = low (1.25MHz):

Equation 4. GUID-BBDF9FDA-48AD-437C-986F-C8AEB4028E0B-low.gif

For very small output voltages, an absolute minimum on-time of about 50 ns is kept to limit switching losses. The operating frequency is thereby reduced from its nominal value, which keeps efficiency high. Using TON, the typical peak inductor current in Power Save Mode is approximated by:

Equation 5. GUID-200A9E55-6C91-449C-9DF7-B090186472B4-low.gif

There is a minimum off-time which limits the duty cycle of the TPS62147, TPS62148. When VIN decreases to typically 15% above VOUT, the TPS62147, TPS62148 does not enter Power Save Mode, regardless of the load current. The device maintains output regulation in PWM mode.

The output voltage ripple in power save mode is given by Equation 6:

Equation 6. GUID-BCEA3EAE-B6A5-47A8-A67F-1AAEDECE7459-low.gif