SLVSC52B July   2013  – September 2015 TPS62152-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Pulse-Width Modulation (PWM) Operation
      2. 7.3.2  100% Duty-Cycle Operation
      3. 7.3.3  Enable / Shutdown (EN)
      4. 7.3.4  Soft Start or Tracking (SS/TR)
      5. 7.3.5  Current-Limit and Short-Circuit Protection
      6. 7.3.6  Power Good (PG)
      7. 7.3.7  Pin-Selectable Output Voltage (DEF)
      8. 7.3.8  Frequency Selection (FSW)
      9. 7.3.9  Undervoltage Lockout (UVLO)
      10. 7.3.10 Thermal Shutdown
      11. 7.3.11 Tracking Function
      12. 7.3.12 Feedback Pin (FB)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Save Mode Operation
      2. 7.4.2 Active Output Discharge
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 External Component Selection
          1. 8.2.2.1.1 Inductor Selection
          2. 8.2.2.1.2 Output Capacitor
            1. 8.2.2.1.2.1 Input Capacitor
            2. 8.2.2.1.2.2 Soft-Start Capacitor
        2. 8.2.2.2 Output Filter and Loop Stability
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resource
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGT|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

The TPS62590-Q1 device is designed to operate with a wide range of input voltages ranging from 4 V to 17 V. For most applications, a 10-μF capacitor is sufficient and recommended at the PVIN pin. Connect a capacitor with a larger value to further reduce input current ripple. The input capacitor buffers the input voltage for transient events and also decouples the converter from the supply. TI recommends using a low-ESR multilayer ceramic capacitor for the best filtering. Place the capacitor between the PVIN and PGND pins, as close as possible to these pins. Although the AVIN and PVIN supply must come from the same input source, placing a capacitor with a value of 0.1 μF from the AVIN pin to the AGND pin is recommended to avoid potential noise coupling. Use of an RC low-pass filter from the PVIN to AVIN pin is allowed but not required.

Capacitance derating for aging, temperature, and DC bias must be taken into consideration while determining the capacitor value.