SLVSBB8B August   2014  – May 2017 TPS62180 , TPS62182

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable / Shutdown (EN)
      2. 8.3.2 Soft Start / Tracking (SS/TR)
      3. 8.3.3 Power Good (PG)
      4. 8.3.4 Undervoltage Lockout (UVLO)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode (PSM) Operation
      3. 8.4.3 Minimum Duty Cycle and 100% Mode Operation
      4. 8.4.4 Automatic Efficiency Enhancement (AEE)
      5. 8.4.5 Phase-Shifted Operation
      6. 8.4.6 Current Limit, Current Balancing, and Short Circuit Protection
      7. 8.4.7 Tracking
      8. 8.4.8 Operation with Fixed VOUT
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Typical TPS62180 Application
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Programming the Output Voltage
          3. 9.2.1.2.3 Output Filter Selection
          4. 9.2.1.2.4 Inductor Selection
          5. 9.2.1.2.5 Output Capacitor Selection
          6. 9.2.1.2.6 Input Capacitor Selection
          7. 9.2.1.2.7 Soft Start Capacitor Selection
        3. 9.2.1.3 Application Performance Curves
      2. 9.2.2 TPS62180 Low Profile Solution
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Inductor
          2. 9.2.2.2.2 Input and Output Capacitors
          3. 9.2.2.2.3 Soft Start Capacitor
          4. 9.2.2.2.4 Using the Accurate EN Threshold
        3. 9.2.2.3 Application Performance Curves
    3. 9.3 TPS62180 Output Voltage Application Examples
      1. 9.3.1 Application Schematic Examples
      2. 9.3.2 Design Requirements
      3. 9.3.3 External Component Selection
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Layout
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Related Links
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Revision History

Changes from A Revision (August 2014) to B Revision

  • Added Feature: Pin-to-Pin Compatible with TPS62184Go
  • Added WEBENCH® information to Features, Detailed Design Procedures, and Development Support sections.Go
  • Changed the BODY SIZE value From: 2.14 mm x 3.14 mm To: 2.10 mm x 3.10 mm in the Device Information tableGo
  • Added SW1, SW2, (AC, less than 10ns) and Note (3) to the Pin voltage range in the Absolute Maximum Ratings tableGo
  • Changed Handling Ratings To: ESD Ratings tableGo
  • Added Table 1 Go
  • Added the application note Go
  • Changed the Design Requirements paragraphGo
  • Added Note (2) to Table 6 Go
  • Added Figure 31 and Figure 32Go
  • Added Figure 37 Go
  • Changed the Design Requirements paragraphGo
  • Added Figure 38 and Figure 39 to the Inductor sectionGo
  • Changed Figure 55 Go

Changes from * Revision (August 2014) to A Revision

  • Released to Production Go