SLUSDN9B
November 2021 – July 2022
TPS62441-Q1
,
TPS62442-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
7.7
Typical Characteristics
8
Parameter Measurement Information
8.1
Schematic
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Precise Enable (EN)
9.3.2
COMP/FSET
9.3.3
MODE/SYNC
9.3.4
Spread Spectrum Clocking (SSC)
9.3.5
Undervoltage Lockout (UVLO)
9.3.6
Power-Good Output (PG)
9.3.7
Thermal Shutdown
9.4
Device Functional Modes
9.4.1
Pulse Width Modulation (PWM) Operation
9.4.2
Power Save Mode Operation (PWM and PFM)
9.4.3
100% Duty-Cycle Operation
9.4.4
Current Limit and Short Circuit Protection
9.4.5
Foldback Current Limit and Short Circuit Protection
9.4.6
Output Discharge
9.4.7
Soft Start
10
Application and Implementation
10.1
Application Information
10.1.1
Programming the Output Voltage
10.1.2
External Component Selection
10.1.2.1
Inductor Selection
10.1.2.2
Capacitor Selection
10.1.2.2.1
Input Capacitor
10.1.2.2.2
Output Capacitor
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.3
Application Curves
11
Power Supply Recommendations
12
Layout
12.1
Layout Guidelines
12.2
Layout Example
13
Device and Documentation Support
13.1
Device Support
13.1.1
Third-Party Products Disclaimer
13.2
Documentation Support
13.2.1
Related Documentation
13.3
Receiving Notification of Documentation Updates
13.4
Support Resources
13.5
Trademarks
13.6
Electrostatic Discharge Caution
13.7
Glossary
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RQR|14
MPQF624
Thermal pad, mechanical data (Package|Pins)
RQR|14
QFND745
Orderable Information
slusdn9b_oa
slusdn9b_pm
13.2
Documentation Support