SLUSDN9B November   2021  – July 2022 TPS62441-Q1 , TPS62442-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Parameter Measurement Information
    1. 8.1 Schematic
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable (EN)
      2. 9.3.2 COMP/FSET
      3. 9.3.3 MODE/SYNC
      4. 9.3.4 Spread Spectrum Clocking (SSC)
      5. 9.3.5 Undervoltage Lockout (UVLO)
      6. 9.3.6 Power-Good Output (PG)
      7. 9.3.7 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PWM and PFM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit and Short Circuit Protection
      5. 9.4.5 Foldback Current Limit and Short Circuit Protection
      6. 9.4.6 Output Discharge
      7. 9.4.7 Soft Start
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Programming the Output Voltage
      2. 10.1.2 External Component Selection
        1. 10.1.2.1 Inductor Selection
        2. 10.1.2.2 Capacitor Selection
          1. 10.1.2.2.1 Input Capacitor
          2. 10.1.2.2.2 Output Capacitor
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TPS6244x-Q1 is a family of pin-to-pin dual 1-A, dual 2-A or 3-A, and 1-A high-efficiency and easy-to-use synchronous step-down DC/DC converters. They are based on a peak current mode control topology. The devices are designed for automotive applications such as infotainment and advanced driver assistance systems. Low resistive switches allow up to 3-A continuous output current and a total maximum output current up to 4 A at high ambient temperature. The switching frequency is externally adjustable from 1.8 MHz to 4 MHz and can also be synchronized to an external clock from 2 MHz to 4 MHz. In PWM and PFM mode, the TPS6244x-Q1 automatically enters power save mode at light loads to maintain high efficiency across the whole load range. The TPS6244x-Q1 provides a 1% output voltage accuracy in PWM mode, which helps design a power supply with high output voltage accuracy.

The TPS6244x-Q1 is available as an adjustable voltage version, packaged in a VQFN package.

Device Information
PART NUMBER PACKAGE(1)BODY SIZE (NOM)
TPS62441-Q1VQFN-HR2.30 mm × 2.70 mm
TPS62442-Q1
For all available packages, see the orderable addendum at the end of the data sheet.
GUID-20211105-SS0I-63G9-Q2QM-XGHNG7VQZT7G-low.gifSchematic
GUID-20210707-CA0I-VPH7-TJ53-LLCCPT6DGSQX-low.gifEfficiency vs Output Current, VOUT = 3.3 V, PWM and PFM, fSW = 2.25 MHz