SLUSEQ8A november   2021  – may 2023 TPS62441 , TPS62442

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  9. 8 Parameter Measurement Information
    1. 8.1 Schematic
  10. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable (EN)
      2. 9.3.2 COMP/FSET
      3. 9.3.3 MODE/SYNC
      4. 9.3.4 Undervoltage Lockout (UVLO)
      5. 9.3.5 Power-Good Output (PG)
      6. 9.3.6 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PWM/PFM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit and Short-Circuit Protection
      5. 9.4.5 Output Discharge
      6. 9.4.6 Soft Start
  11. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Programming the Output Voltage
      2. 10.1.2 External Component Selection
        1. 10.1.2.1 Inductor Selection
        2. 10.1.2.2 Capacitor Selection
          1. 10.1.2.2.1 Input Capacitor
          2. 10.1.2.2.2 Output Capacitor
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 Power Supply Recommendations
    4. 10.4 Layout
      1. 10.4.1 Layout Guidelines
      2. 10.4.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4 Thermal Information

THERMAL METRIC(1) TPS6244x TPS6244x UNIT
 (JEDEC)  (EVM)
14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 68.7 53.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.8 n/a °C/W
RθJB Junction-to-board thermal resistance 15.1 n/a °C/W
ΨJT Junction-to-top characterization parameter 3.5 1.9 °C/W
ΨJB Junction-to-board characterization parameter 14.9 20.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.