SLVS651B May   2006  – December 2015 TPS62510

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Tracking (OVT)
      2. 7.3.2 Power Good
      3. 7.3.3 Undervoltage Lockout
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Soft Start
      2. 7.4.2 100% Duty Cycle Low Dropout Operation
      3. 7.4.3 Power Save Mode Operation (MODE)
      4. 7.4.4 Power Save Mode Transition Thresholds
      5. 7.4.5 Short-Circuit Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor Selection
        2. 8.2.2.2 Output Filter Design (Inductor and Output Capacitor)
        3. 8.2.2.3 Setting the Output Voltage Using the Feedback Resistor Divider
        4. 8.2.2.4 Inductor Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Example
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  1. Place and route the power components first (C1, L1, C2).
  2. The input capacitor (C1) must be placed as close as possible from PVIN to PGND.
  3. The inductor must be placed as close as possible to the switch pin.
  4. All ground connections (shown in bold) must be on a common ground plane or form a star ground.
  5. Analog ground (AGND) and power ground (PGND), as well as the exposed thermal pad, must be tight together.
  6. The feedback network (R1, C3, R2) must be routed away from the inductor (L1) and should be grounded to the exposed thermal pad.
  7. The feedback network must sense and regulate the output voltage across the output capacitor to minimize load regulation.

TPS62510 layout_cir_lvs651.gif Figure 22. Layout Guidelines

10.2 Layout Example

TPS62510 sbas651_layout_Ex.gif Figure 23. Recommended Layout