SLVS651B May   2006  – December 2015 TPS62510

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Output Voltage Tracking (OVT)
      2. 7.3.2 Power Good
      3. 7.3.3 Undervoltage Lockout
      4. 7.3.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Soft Start
      2. 7.4.2 100% Duty Cycle Low Dropout Operation
      3. 7.4.3 Power Save Mode Operation (MODE)
      4. 7.4.4 Power Save Mode Transition Thresholds
      5. 7.4.5 Short-Circuit Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor Selection
        2. 8.2.2.2 Output Filter Design (Inductor and Output Capacitor)
        3. 8.2.2.3 Setting the Output Voltage Using the Feedback Resistor Divider
        4. 8.2.2.4 Inductor Selection
      3. 8.2.3 Application Curves
    3. 8.3 System Example
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DRC Package
10-Pin VSON
Top View
TPS62510 po_lvs651.gif
The exposed thermal pad is connected to AGND.

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
SW 1 — Switch pin of the converter. The inductor is connected here.
PGND 2 — Power ground for the converter
AGND 3 — Analog ground connection
FB 4 I Feedback voltage sense input. Connect directly to VOUT or to the midpoint of an external voltage divider for the adjustable version.
OVT 5 I Output voltage tracking input. The signal applied to this pin is used as reference voltage overriding the internal reference voltage when it is below the internal 0.6-V reference. If this feature is not used, the OVT pin is connected to VIN.
EN 6 I Enable pin. A logic high enables the regulator, a logic low disables the regulator. This pin needs to be terminated and not left floating.
MODE 7 I This pin is used to force fixed frequency PWM operation or to synchronize the device to an external clock signal. With MODE = High, the device is forced into 1.5-MHz fixed frequency PWM operation. With MODE = Low, the device automatically enters the power save mode at light load currents.
PG 8 O Power good indication. This is a open drain output that is low when the device is disabled or the output voltage drops 10% below target.
AVIN 9 — Power supply for control circuitry. Must be connected to the same voltage supply as PVIN through RC filter.
PVIN 10 — Input voltage for the power stage. VIN must be connected to the same voltage supply as AVIN.
Exposed Thermal Pad C2 — Connect the exposed thermal pad to analog ground AGND.