SLVS848D July   2009  – October 2015 TPS62620 , TPS62621 , TPS62622 , TPS62623 , TPS62624 , TPS62625

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection
      2. 8.3.2 Enable
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Soft Start
      2. 8.4.2 Switching Frequency
      3. 8.4.3 Power-Save Mode
      4. 8.4.4 Output Capacitor Discharge (TPS62624 Only)
      5. 8.4.5 Short-Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Checking Loop Stability
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Information
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Package Summary
    2. 13.2 Chip Scale Package Dimensions

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
VIN Voltage at VIN, SW(2) –0.3 7 V
Voltage at FB(2) -0.3 3.6
Voltage at EN, MODE (2) -0.3 VIN + 0.3
Power dissipation Internally limited
TA Operating temperature range(3) -40 85 °C
TJ (max) Maximum operating junction temperature 150 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependent on the maximum operating junction temperature (TJ(max)), the maximum power dissipation of the device in the application (PD(max)), and the junction-to-ambient thermal resistance of the part/package in the application (θJA), as given by the following equation: TA(max) = TJ(max) – (θJA x PD(max)). To achieve optimum performance, it is recommended to operate the device with a maximum junction temperature of 105°C.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) ±2000 V
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN TYP MAX UNIT
Supply voltage, VIN 2.3 5.5 V
Operating free air temperature, TA –40 85 °C
Operating junction temperature, TJ 150 °C

7.4 Thermal Information

THERMAL METRIC(1) TPS626x UNIT
YFF/YFD (DSBGA)
6 PINS
RθJA Junction-to-ambient thermal resistance 130 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 1.2 °C/W
RθJB Junction-to-board thermal resistance 22 °C/W
ψJT Junction-to-top characterization parameter 5.0 °C/W
ψJB Junction-to-board characterization parameter 22.0 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Electrical Characteristics

Minimum and maximum values are at VIN = 2.3 V to 5.5 V, VOUT = 1.82 V, EN = 1.82 V, AUTO mode and TA = –40°C to 85°C. Typical values are at VIN = 3.6 V, VOUT = 1.82 V, EN = 1.82 V, AUTO mode and TA = 25°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
VIN Input voltage range 2.3 5.5 V
IQ Operating quiescent current IOUT = 0 mA, device not switching 31 55 μA
IOUT = 0 mA, PWM mode 7.6 mA
I(SD) Shutdown current EN = GND 0.2 2.5 μA
UVLO Undervoltage lockout threshold 2.05 2.1 V
ENABLE, MODE
VIH High-level input voltage 1.0 V
VIL Low-level input voltage 0.4 V
Ilkg Input leakage current Input connected to GND or VIN 0.01 1 μA
POWER SWITCH
RDS(on) P-channel MOSFET on resistance TPS62620
TPS62621
TPS62622		 VIN = V(GS) = 3.6 V, PWM mode 270 mΩ
VIN = V(GS) = 2.5 V, PWM mode 350 mΩ
TPS62623
TPS62624		 VIN = V(GS) = 3.6 V, PWM mode 480 mΩ
VIN = V(GS) = 2.5 V, PWM mode 640 mΩ
Ilkg P-channel leakage current, PMOS V(DS) = 5.5 V, –40°C ≤ TJ ≤ 85°C 1 μA
RDS(on) N-channel MOSFET on resistance TPS6262x VIN = V(GS) = 3.6 V, PWM mode 140 mΩ
VIN = V(GS) = 2.5 V, PWM mode 200 mΩ
Ilkg N-channel leakage current, NMOS V(DS) = 5.5 V, –40°C ≤ TJ ≤ 85°C 1 μA
RDIS Discharge resistor for power-down sequence 15 50 Ω
P-MOS current limit 2.3 V ≤ VIN ≤ 4.8 V, open loop 975 1100 1200 mA
Input current under short-circuit conditions VOUT shorted to ground 19 mA
Thermal shutdown 140 °C
Thermal shutdown hysteresis 10 °C
OSCILLATOR
fSW Oscillator frequency TPS6262x IOUT = 0 mA, PWM mode 5.4 6 6.6 MHz
OUTPUT
VOUT Regulated DC output voltage TPS6262x 2.3 V ≤ VIN ≤ 4.8 V, 0 mA ≤ IOUT ≤ 600 mA
PFM/PWM operation		 0.98 × VNOM VNOM 1.03 × VNOM V
2.3 V ≤ VIN ≤ 5.5 V, 0 mA ≤ IOUT ≤ 600 mA
PFM/PWM operation		 0.98 × VNOM VNOM 1.04 × VNOM V
2.3 V ≤ VIN ≤ 5.5 V, 0 mA ≤ IOUT ≤ 600 mA
PWM operation		 0.98 × VNOM VNOM 1.02 × VNOM V
Line regulation VIN = VOUT + 0.5 V (min 2.3 V) to 5.5V, IOUT = 200 mA 0.13 %/V
Load regulation IOUT = 0 mA to 600 mA –0.0003 %/mA
Feedback input resistance 480 kΩ
ΔVO Power save mode ripple voltage TPS62620
TPS62621		 IOUT = 1 mA 20 mVPP
TPS62623
TPS62624		 IOUT = 1 mA 24 mVPP
Start-up time TPS62620 IOUT = 0 mA, time from active EN to VOUT 120 μs

7.6 Typical Characteristics

TPS62620 TPS62621 TPS62622 TPS62623 TPS62624 TPS62625 iq1_vi_lvs848.gif
Figure 1. Quiescent Current vs Input Voltage
TPS62620 TPS62621 TPS62622 TPS62623 TPS62624 TPS62625 rdsb_vi_lvs848.gif
TPS62620 PWM Mode Operation
Figure 3. N-Channel RDS(on) vs Input Voltage
TPS62620 TPS62621 TPS62622 TPS62623 TPS62624 TPS62625 rds_vi_lvs848.gif
TPS62620 PWM Mode Operation
Figure 2. P-Channel RDS(on) vs Input Voltage