The TPS6281x-EP synchronous switch mode DC/DC converter is based on a peak current mode control topology. The control loop is internally compensated. To optimize the bandwidth of the control loop to the wide range of output capacitance that can be used with the TPS6281x-EP, one of three internal compensation settings can be selected. See Section 8.3.2. The compensation setting is selected either by a resistor from COMP/FSET to GND, or by the logic state of this pin. The regulation network achieves fast and stable operation with small external components and low-ESR ceramic output capacitors. The device can be operated without a feedforward capacitor on the output voltage divider, however, using a 10pF (typical) feedforward capacitor improves transient response.

The device support forced fixed-frequency PWM operation with the MODE pin tied to a logic high level. The frequency is defined as either internally fixed 2.25MHz when COMP/FSET is tied to GND or VIN, or in a range of 1.8MHz to 4MHz defined by a resistor from COMP/FSET to GND. Alternatively, the devices can be synchronized to an external clock signal in a range from 1.8MHz to 4MHz, applied to the MODE pin with no need for additional passive components. External synchronization is only possible if a resistor from COMP/FSET to GND is used. If COMP/FSET is directly tied to GND or VIN, the device cannot be synchronized externally. An internal PLL allows a change from an internal clock to an external clock during operation. The synchronization to the external clock is done on a falling edge of the clock applied at MODE to the rising edge on the SW pin. This allows roughly a 180° phase shift when the SW pin is used to generate the synchronization signal for a second converter. When the MODE pin is set to a logic low level, the devices operate in power save mode (PFM) at low output current and automatically transfer to fixed-frequency PWM mode at higher output current. In PFM mode, the switching frequency decreases linearly based on the load to sustain high efficiency down to very low output current.