SLUSDM1A March   2020  – December 2021 TPS62816-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable
      2. 9.3.2 COMP/FSET
      3. 9.3.3 MODE/SYNC
      4. 9.3.4 Spread Spectrum Clocking (SSC)
      5. 9.3.5 Undervoltage Lockout (UVLO)
      6. 9.3.6 Power Good Output (PG)
      7. 9.3.7 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PWM/PFM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit and Short Circuit Protection
      5. 9.4.5 Foldback Current Limit and Short Circuit Protection
      6. 9.4.6 Output Discharge
      7. 9.4.7 Soft Start/Tracking (SS/TR)
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Programming the Output Voltage
      2. 10.1.2 External Component Selection
        1. 10.1.2.1 Inductor Selection
        2. 10.1.2.2 Capacitor Selection
          1. 10.1.2.2.1 Input Capacitor
          2. 10.1.2.2.2 Output Capacitor
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Voltage Tracking
      2. 10.3.2 Synchronizing to an External Clock
      3. 10.3.3 Compensation Settings
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

COMP/FSET

This pin allows the user to set two different parameters independently:

  • Internal compensation settings for the control loop (three settings available)
  • The switching frequency in PWM mode from 1.8 MHz to 4 MHz
  • Enable/ disable spread spectrum clocking (SSC)

A resistor from COMP/FSET to GND changes the compensation as well as the switching frequency. The change in compensation allows the user to adopt the device to different values of output capacitance. The resistor must be placed close to the pin to keep the parasitic capacitance on the pin to a minimum. The compensation setting is sampled at the start-up of the converter, so a change in the resistor during operation only has an effect on the switching frequency, but not on the compensation.

To save external components, the pin can also be directly tied to VIN or GND to set a pre-defined switching frequency or compensation. Do not leave the pin floating.

The switching frequency has to be selected based on the input voltage and the output voltage to meet the specifications for the minimum on time and minimum off time.

Example: VIN = 5 V, VOUT = 1 V --> duty cycle (DC) = 1 V / 5 V = 0.2

  • with ton = DC × T --> ton,min = 1/fs,max × DC
  • --> fs,max = 1/ton,min × DC = 1/0.075 µs × 0.2 = 2.6 MHz

The compensation range has to be chosen based on the minimum capacitance used. The capacitance can be increased from the minimum value as given in Table 9-1, up to the maximum of 470 µF in all of the three compensation ranges. If the capacitance of an output changes during operation, for example, when load switches are used to connect or disconnect parts of the circuitry, the compensation has to be chosen for the minimum capacitance on the output. With large output capacitance, the compensation must be done based on that large capacitance to get the best load transient response. Compensating for large output capacitance but placing less capacitance on the output can lead to instability.

The switching frequency for the different compensation setting is determined by the following equations.

For compensation (comp) setting 1 with spread spectrum clocking (SSC) disabled:

Equation 1. GUID-F9728A22-3C0A-460C-9170-AFBD26DA9836-low.gif

For compensation (comp) setting 1 with spread spectrum clocking (SSC) enabled:

Equation 2. GUID-793E64BE-6F66-46F8-8F40-1B235B8F69C0-low.gif

For compensation (comp) setting 2 with spread spectrum clocking (SSC) disabled:

Equation 3. GUID-77AEB35B-B0AF-47D6-8BA1-CC30DCD6FEF0-low.gif
Table 9-1 Switching Frequency and Compensation
COMPENSATIONRCFSWITCHING FREQUENCYMINIMUM OUTPUT
CAPACITANCE
for smallest output capacitance
(comp setting 1)
SSC disabled
10 kΩ ... 4.5 kΩ1.8 MHz (10 kΩ) ... 4 MHz (4.5 kΩ)
according to Equation 1

32 µF × V / VOUT[V]

for smallest output capacitance
(comp setting 1)
SSC enabled
33 kΩ ... 15 kΩ1.8 MHz (33 kΩ) ... 4 MHz (15 kΩ)
according to Equation 2
32 µF × V / VOUT[V]
for best transient response
(larger output capacitance)
(comp setting 2)
SSC disabled
100 kΩ ... 45 kΩ1.8 MHz (100 kΩ) ... 4 MHz (45 kΩ)
according to Equation 3
72 µF × V / VOUT[V]
for smallest output capacitance
(comp setting 1)
SSC disabled
tied to GNDinternally fixed 2.25 MHz32 µF × V / VOUT[V]
for best transient response
(larger output capacitance)
(comp setting 2)
SSC enabled
tied to VINinternally fixed 2.25 MHz72 µF × V / VOUT[V]

The minimum output capacitance required for stability depends on the output voltage as stated in Table 9-1. Refer to Section 10.1.2.2.2 for further details on the output capacitance required depending on the output voltage.

A too-high resistor value for RCF is decoded as "tied to VIN" and a value below the lowest range is decoded as "tied to GND". The minimum output capacitance in Table 9-1 is for capacitors close to the output of the device. If the capacitance is distributed, a lower compensation setting can be required.