SLVSEC6D
June 2019 – March 2020
TPS62840
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Typical Application
Efficiency versus Load Current (VOUT = 1.8 V)
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Smart Enable and Shutdown
8.3.2
Soft Start
8.3.3
Mode Selection: Power-Save Mode (PFM/PWM) or Forced PWM Operation (FPWM)
8.3.4
Output Voltage Selection (VSET)
8.3.5
Undervoltage Lockout UVLO
8.3.6
Switch Current Limit / Short Circuit Protection
8.3.7
Output Voltage Discharge
8.3.8
Thermal Shutdown
8.3.9
STOP Mode
8.4
Device Functional Modes
8.4.1
Power-Save Mode Operation
8.4.2
Forced PWM Mode Operation
8.4.3
100% Mode Operation
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Inductor Selection
9.2.2.2
Output Capacitor Selection
9.2.2.3
Input Capacitor Selection
9.2.3
Application Curves
9.3
System Example
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Support Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DGR|8
MPSS122
DLC|8
MPSS103A
YBG|6
MXBG419
Thermal pad, mechanical data (Package|Pins)
DLC|8
QFND578
Orderable Information
slvsec6d_oa
slvsec6d_pm
Device Images
Typical Application
Efficiency versus Load Current (V
OUT
= 1.8 V)