SLVSEC6D June   2019  – March 2020 TPS62840

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Efficiency versus Load Current (VOUT = 1.8 V)
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Smart Enable and Shutdown
      2. 8.3.2 Soft Start
      3. 8.3.3 Mode Selection: Power-Save Mode (PFM/PWM) or Forced PWM Operation (FPWM)
      4. 8.3.4 Output Voltage Selection (VSET)
      5. 8.3.5 Undervoltage Lockout UVLO
      6. 8.3.6 Switch Current Limit / Short Circuit Protection
      7. 8.3.7 Output Voltage Discharge
      8. 8.3.8 Thermal Shutdown
      9. 8.3.9 STOP Mode
    4. 8.4 Device Functional Modes
      1. 8.4.1 Power-Save Mode Operation
      2. 8.4.2 Forced PWM Mode Operation
      3. 8.4.3 100% Mode Operation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 System Example
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VIN = 3.6 V, TJ = –40°C to 125°C, STOP = GND, MODE = GND, typical values are at TJ = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ_NO_LOAD No load
operating input current		 EN = VIN, IOUT = 0µA, VOUT = 1.8V
device switching		 60 nA
IQ_NO_LOAD No load
operating input current		 EN = VIN, IOUT = 0µA, VOUT = 1.2V
device switching		 80 nA
IQ_NO_LOAD No load
operating input current
(PWM Mode)		 EN = VIN, IOUT = 0µA, VOUT = 1.8V, MODE = VIN
device switching		 3 mA
IQ_VIN Operating quiescent current into pin VIN EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V
device not switching, TJ = 25°C
(DLC package option)		 36 100 nA
IQ_VOS Operating quiescent current into pin VOS EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V
device not switching, TJ = 25°C
(DLC package option)		 56 120 nA
IQ_VIN Operating quiescent current into pin VIN EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V
device not switching, TJ = -40°C to 85°C 		36 360 nA
IQ_VOS Operating quiescent current into pin VOS EN = VIN, IOUT = 0µA, VOUT = 1.55V or VOUT = 1.8V
device not switching, TJ = -40°C to 85°C		 56 170 nA
IQ_VOS Operating quiescent current into VOS pin EN = VIN, VOUT = 3.3V
device not switching		 70 nA
EN = VIN, VOUT < 1.5 V
device not switching		 5 nA
EN, STOP = VIN, 3V < VOUT  < 3.3V
TJ = -40°C to 85°C		 5 100 nA
IQ_100%_MODE Operating quiescent current 100% Mode VIN = VOUT = 3.3V, TJ = -40°C to 85°C 120 nA
IQ_VIN_STOP Operating quiescent current into pin VIN STOP = High, VOUT = 1.8V, TJ = -40°C to 85°C 70 175 µA
ISD Shutdown current EN = GND, shutdown current into VIN
VSET = GND, TJ = -40°C to 85°C 		25 300 nA
VTH_UVLO+ Undervoltage lockout threshold Rising VIN 1.72 1.8 V
VTH_UVLO– Falling VIN 1.45 1.75 V
EN, MODE, STOP INPUTS
VIH_TH High level input voltage 1.1 V
VIL_TH Low level input voltage 0.4 V
IIN Input bias current MODE input, TJ = -40°C to 85°C 1 25 nA
RPD Internal pull-down resistance EN, STOP inputs 200 450 kΩ
POWER SWITCHES
RDS(ON) High-side MOSFET
on-resistance
(DLC, YBG package)		 VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 430 600 mΩ
VIN = 5V, I = 200mA, TJ = -40°C to 85°C 340 465
Low-side MOSFET
on-resistance
(DLC, YBG package)		 VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 170 240 mΩ
VIN = 5V, I = 200mA, TJ = -40°C to 85°C 135 180
High-side MOSFET
on-resistance
(DGR package)		 VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 460 630 mΩ
VIN = 5V, I = 200mA, TJ = -40°C to 85°C 370 495
Low-side MOSFET
on-resistance
(DGR package)		 VIN = 3.6V, I = 200mA, TJ = -40°C to 85°C 200 270 mΩ
VIN = 5V, I = 200mA, TJ = -40°C to 85°C 165 210
ILIMF_SS Soft-start
switch current limit(1) 		0.15 0.225 0.3 A
ILIMF High-side MOSFET switch current limit(1) 1.0 1.2 1.4 A
Low-side MOSFET switch current limit 1.0 A
ILIMN Negative current limit 533 mA
tI_LIM_DELAY Current limit propagation delay 50 ns
ILKG_SW Leakage current
into SW pin		 VSW = 1.8V, TJ = -40°C to 85°C 10 nA
OUTPUT VOLTAGE DISCHARGE
IDISCHARGE_VOS Output discharge current EN = GND, sink current into VOS pin, over VIN range
VOUT = 1.8V, TJ = -40°C to 85°C		 16 35 44 mA
THERMAL PROTECTION
TSD Thermal shutdown temperature Rising junction temperature, PWM Mode 160 °C
Thermal shutdown hysteresis 5 °C
OUTPUT
VOUT Output voltage accuracy PWM Mode, IOUT = 0 mA, VOUT >= 1.8 V -1.5 0 1.5 %
PWM Mode, IOUT = 0 mA, VOUT <= 1.55 V -2 0 2 %
VOUT DC output voltage
load regulation		 PWM Mode 0 %/mA
DC output voltage
line regulation		 PWM Mode
VOUT = 1.8V, IOUT = 200 mA, over VIN range		 0 %/V
fSW Switching frequency VIN = 3.6V, VOUT = 1.8V, MODE = VIN
IOUT = 0mA		 1.8 MHz
tSTARTUP_DELAY Regulator start up delay time VIN = 3.6V, from EN = low to high until device starts switching 200 µs
tSTARTUP_DELAY Regulator start up delay time EN ramps with VIN, VIN 0 to 3.6V (< 100us), until device starts switching 10 ms
tSS Soft-start time IOUT = 0mA 120 µs
tSS_ILIMF Reduced current limit soft-start timeout 700 1200 µs
(1) This is the static current limit. It can be temporarily higher in applications due to internal propagation delay (see Switch Current Limit / Short Circuit Protection section).