SLUSDU8F September   2019  – October 2023 TPS62860 , TPS62861

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 I2C Interface Timing Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Power Save Mode
      2. 8.3.2  Forced PWM Operation
      3. 8.3.3  Smart Enable and Shutdown (EN)
      4. 8.3.4  Soft Start
      5. 8.3.5  Output Voltage Selection (VSEL) for TPS62860x
      6. 8.3.6  Output Voltage Selection (VSEL and I2C)
      7. 8.3.7  Forced PWM Mode During Output Voltage Change
      8. 8.3.8  Undervoltage Lockout (UVLO)
      9. 8.3.9  Power Good (PG)
      10. 8.3.10 Switch Current Limit and Short Circuit Protection
      11. 8.3.11 Thermal Shutdown
      12. 8.3.12 Output Voltage Discharge
    4. 8.4 Programming
      1. 8.4.1 Serial Interface Description
      2. 8.4.2 Standard- and Fast-Mode Protocol
      3. 8.4.3 I2C Update Sequence
      4. 8.4.4 I2C Register Reset
    5. 8.5 Register Map
      1. 8.5.1 Slave Address Byte
      2. 8.5.2 Register Address Byte
      3. 8.5.3 VOUT Register 1
      4. 8.5.4 VOUT Register 2
      5. 8.5.5 CONTROL Register
      6. 8.5.6 STATUS Register
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application, TPS628610
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application, TPS628600, TPS62860x
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-FBC6654D-668F-44DE-962F-0D634EDE133F-low.gifFigure 6-1 8-Pin DSBGA YCH Package (Top View)
Table 6-1 Pin Functions, TPS628610, TPS628600, TPS6286003, and TPS6286004
PINTYPEDESCRIPTION
NAMENO.
GNDD2PWRGND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
VOSD1INOutput voltage sense pin for the internal feedback divider network and regulation loop. This pin also discharges VOUT by an internal MOSFET when the converter is disabled. Connect this pin directly to the output capacitor with a short trace.
VINC2PWRVIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage spike suppression. A ceramic capacitor is required.
SWC1PWRThe switch pin is connected to the internal MOSFET switches. Connect the inductor to this terminal.
VSELB2IN

Voltage Selection Pin. Can be toggled during operation. LOW = 0.6 V(TPS628600/10), 1.05 V(TPS628603), HIGH = 1.1 V(TPS628600/10), 0.65 V(TPS628603)

ENB1INA high level enables the devices and a low level turns the device off. The pin features an internal pulldown resistor, which is disabled after the device has started up.
SDAA2INI2C serial data pin. Do not leave floating.
SCLA1INI2C serial clock pin. Do not leave floating.
Table 6-2 Pin Functions, TPS628601
PIN TYPE DESCRIPTION
NAME NO.
GND D2 PWR GND supply pin. Connect this pin close to the GND terminal of the input and output capacitor.
VOS D1 IN Output voltage sense pin for the internal feedback divider network and regulation loop. This pin also discharges VOUT by an internal MOSFET when the converter is disabled. Connect this pin directly to the output capacitor with a short trace.
VIN C2 PWR VIN power supply pin. Connect the input capacitor close to this pin for best noise and voltage spike suppression. A ceramic capacitor is required.
SW C1 PWR The switch pin is connected to the internal MOSFET switches. Connect the inductor to this terminal.
PG B2 OUT Open-drain power-good output
EN B1 IN A high level enables the devices and a low level turns the device off. The pin features an internal pulldown resistor, which is disabled after the device has started up.
VSEL-1 A2 IN Voltage Selection Pin. Can be toggled during operation.
VSEL-2 A1 IN Voltage Selection Pin. Can be toggled during operation.