SLVSG71 june   2023 TPS62901-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Mode Selection and Device Configuration MODE/S-CONF
      2. 8.3.2  Adjustable VO Operation (External Voltage Divider)
      3. 8.3.3  Selectable VO Operation (VSET and Internal Voltage Divider)
      4. 8.3.4  Soft Start and Tracking (SS/TR)
        1. 8.3.4.1 Tracking Function
      5. 8.3.5  Smart Enable with Precise Threshold
      6. 8.3.6  Power Good (PG)
      7. 8.3.7  Output Discharge Function
      8. 8.3.8  Undervoltage Lockout (UVLO)
      9. 8.3.9  Current Limit and Short-Circuit Protection
      10. 8.3.10 High Temperature Specifications
      11. 8.3.11 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced Pulse Width Modulation (FPWM) Operation
      2. 8.4.2 Power Save Mode Operation (Auto PFM and PWM)
      3. 8.4.3 AEE (Automatic Efficiency Enhancement)
      4. 8.4.4 100% Duty-Cycle Operation
      5. 8.4.5 Starting into a Prebiased Load
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application with Adjustable Output Voltage
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Programming the Output Voltage
        3. 9.2.2.3 External Component Selection
          1. 9.2.2.3.1 Output Filter and Loop Stability
          2. 9.2.2.3.2 Inductor Selection
          3. 9.2.2.3.3 Capacitor Selection
            1. 9.2.2.3.3.1 Output Capacitor
            2. 9.2.2.3.3.2 Input Capacitor
            3. 9.2.2.3.3.3 Soft-Start Capacitor
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Application Curves Vout = 1.8 V
        2. 9.2.3.2 Application Curves Vout = 1.2 V
        3. 9.2.3.3 Application Curves Vout = 0.6 V
    3. 9.3 Typical Application with Selectable VOUT using VSET
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Programming the Output Voltage
      3. 9.3.3 Application Curves
        1. 9.3.3.1 Application Curves Vout = 5 V
        2. 9.3.3.2 Application Curves Vout = 3.3 V
    4. 9.4 System Examples
      1. 9.4.1 LED Power Supply
      2. 9.4.2 Powering Multiple Loads
      3. 9.4.3 Voltage Tracking
      4. 9.4.4 Inverting Buck-Boost (IBB)
    5. 9.5 Power Supply Recommendations
    6. 9.6 Layout
      1. 9.6.1 Layout Guidelines
      2. 9.6.2 Layout Example
      3. 9.6.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

VI = 3 V to 18 V, TJ = -40C °C to +165°C,  Typical values at VI = 12 V and TA = 25 °C unless otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
IQ Operating Quiescent Current (Power Save Mode) Iout = 0 mA device not switching 4 µA
IQ;PWM Operating Quiescent Current (PWM Mode) VIN= 12 V, VOUT = 1.2 V; Iout = 0 mA, device switching 8 mA
ISD Shutdown current into VIN pin EN = 0 V, TJ = –40 °C to 150°C  0.27 3.5 µA
VUVLO Undervoltage Lockout VIN rising, TJ = –40 °C to 150°C  2.85 2.925 3.0 V
Undervoltage lockout VIN falling 2.71 2.79 2.87 V
VUVLO Undervoltage lockout hysteresis 130 mV
CONTROL & INTERFACE
ILKG EN input leakage current EN = 5 V 10 310 nA
VIH;MODE High-level input voltage at MODE/S-CONF Pin 1.0 V
VIL;MODE Low-level input voltage at MODE/S-CONF Pin 0.15 V
TSD Thermal shutdown threshold TJ rising 168 175 185 °C
Thermal shutdown hysteresis TJ falling 12.5
VIH High-level input voltage at EN-Pin 0.97 1.0 1.03 V
VIL Low-level input voltage at EN-Pin 0.820 0.850 0.880 V
VPG Power-good threshold VFB rising, referenced to VFB nominal 93% 96% 99%
VFB falling, referenced to VFB nominal 88% 92% 96%
VPG_HYS Power-good threshold hysteresis  1.5% 3.5% 6%
VPG,OL Low-level output voltage at PG pin ISINK = 1 mA 0.4 V
IPG,LKG Input leakage current into PG pin VPG = 5 V, TJ = –40 °C to 150 °C  25 550 nA
tPG,DLY Power-good delay time VFB rising and falling 32 µs
CSET Maximum capacitance connected to VSET pin 30 pF
POWER SWITCHES
ILKG;SW Leakage current into SW-Pin EN = 0 V, VSW = VOS = 5.5 V,  TJ up to 150°C 2 7 µA
RDS;ON High-side FET on resistance VIN > 4 V, ISW = 500 mA 62 111 mΩ
Low-side FET on resistance VIN > 4 V, ISW = 500 mA 22 41
ILIM High-side FET current limit 1.8 2.2 2.8 A
Low-side FET current limit 1.6 2 2.4 A
ILIM;SINK Low-side FET sink current limit 1.3 1.7 2.5 A
fSW Switching frequency 2.5-MHz selection 2.5 MHz
TON(MIN) Minimum On-time 30 ns
fSW Switching frequency 1.0-MHz selection 1.0 MHz
OUTPUT
VO Output voltage regulation VSET Configuration selected, TJ = 25°C –1% +1%
VO Output voltage regulation VSET Configuration selected –1.5% +1.5%
VFB Feedback regulation voltage Adjustable Configuration selected 0.6 V
VFB Feedback voltage regulation FB-Option selected. TJ = 25°C. –0.6% +0.6%
VFB Feedback voltage regulation FB-Option selected –1.25% +1.25%
IFB Input leakage current into FB pin Adjustable configuration, VFB = 0.6 V 1 70 nA
Tdelay Start-up delay time IO = 0 mA, time from EN=HIGH until start switching, Adjustable Configuration selected 600 1400 µs
Start-up delay time IO = 0 mA, time from EN=HIGH until start switching, VSET Configuration selected. The typical value is based on the first option of VSET configuration. 650 1850 µs
TSS Soft-start time  IO = 0 mA after Tdelay, from 1st switching pulse until target VO , Css=Open  150 µs
ISS SS/TR source current 2.25 2.5 2.75 µA
VFB/VSS/TR Tracking gain, adjustable configuration 0.75
VFB/VSS/TR Tracking gain tolerance ±8 mV
RDISCH Active discharge resistance Discharge = ON - Option Selected, EN = LOW 7.5 30 Ω