SLVSGD0A March   2022  – March 2023 TPS629211-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Thermal Information - DYC Package
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin)
      2. 8.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 8.3.3 Selectable VO Operation (VSET and Internal Voltage Divider)
      4. 8.3.4 Smart Enable with Precise Threshold
      5. 8.3.5 Power Good (PG)
      6. 8.3.6 Output Discharge Function
      7. 8.3.7 Undervoltage Lockout (UVLO)
      8. 8.3.8 Current Limit and Short Circuit Protection
      9. 8.3.9 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Forced Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (Auto PFM/PWM)
      3. 8.4.3 AEE (Automatic Efficiency Enhancement)
      4. 8.4.4 100% Duty-Cycle Operation
      5. 8.4.5 Starting into a Prebiased Load
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Programming the Output Voltage
        3. 9.2.2.3 External Component Selection
          1. 9.2.2.3.1 Output Filter and Loop Stability
          2. 9.2.2.3.2 Inductor Selection
          3. 9.2.2.3.3 Capacitor Selection
            1. 9.2.2.3.3.1 Output Capacitor
            2. 9.2.2.3.3.2 Input Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Powering Multiple Loads
      2. 9.3.2 Inverting Buck-Boost (IBB)
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
      3. 9.5.3 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Mode Selection and Device Configuration (MODE/S-CONF Pin)

The MODE/S-CONF pin is an input with two functions, which can be used to customize the device behavior in two ways:

  • Select the device mode (forced PWM or auto PFM/PWM operation) traditionally with a HIGH or LOW level.
  • Select the device configuration (switching frequency, internal and external feedback, output discharge, and PFM/PWM mode) by connecting a single resistor to this pin.

The device interprets this pin during its start-up sequence after the internal OTP readout and before it starts switching in soft start. If the device reads a HIGH or LOW level, dynamic mode change is active and PFM/PWM mode can be changed during operation. If the device reads a resistor value, there is no further interpretation during operation and the device mode or other configurations cannot be changed afterward.

GUID-20210614-CA0I-LXCZ-MHP0-RTC03TBDSZNB-low.gif Figure 8-1 Interpretation of S-CONF and VSET Flow
Table 8-1 Smart-CONFIG Setting Table
# M ODE/S-CONF Level Or Resistor Value [Ω] #GUID-85CC9A7B-B11B-4406-BD40-AC167785450E/GUID-D7E038E4-7947-458D-904B-DC1D64F8CBE8 FB/VSET Pin FSW (MHz) Output Discharge Mode (Auto Or Forced PWM) Dynamic Mode Change
Setting Options by Level
1 GND external FB up to 2.5#GUID-85CC9A7B-B11B-4406-BD40-AC167785450E/GUID-032A184E-4B4E-43A9-8165-FE617EF3148D yes Auto PFM/PWM with AEE Active
2 HIGH (> 1.8 V) external FB 2.5 yes Forced PWM
Setting Options by Resistor
3 7.50 k external FB up to 2.5#GUID-85CC9A7B-B11B-4406-BD40-AC167785450E/GUID-032A184E-4B4E-43A9-8165-FE617EF3148D no Auto PFM/PWM with AEE not active
4 9.31 k external FB 2.5 no Forced PWM
5 11.50 k external FB 1 yes Auto PFM/PWM
6 14.30 k external FB 1 yes Forced PWM
7 17.80 k external FB 1 no Auto PFM/PWM
8 22.10 k external FB 1 no Forced PWM
9 27.40 k VSET up to 2.5#GUID-85CC9A7B-B11B-4406-BD40-AC167785450E/GUID-032A184E-4B4E-43A9-8165-FE617EF3148D yes Auto PFM/PWM with AEE
10 34.00 k VSET 2.5 yes Forced PWM
11 42.20 k VSET up to 2.5#GUID-85CC9A7B-B11B-4406-BD40-AC167785450E/GUID-032A184E-4B4E-43A9-8165-FE617EF3148D no Auto PFM/PWM with AEE
12 52.30 k VSET 2.5 no Forced PWM
13 64.90 k VSET 1 yes Auto PFM/PWM
14 80.60 k VSET 1 yes Forced PWM
15 100.00 k VSET 1 no Auto PFM/PWM
16 124.00 k VSET 1 no Forced PWM
(1) E96 Resistor Series, 1% accuracy, temperature coefficient better or equal than ±200 ppm/°C
(2) FSW varies based on VIN and VOUT. See GUID-E12DF716-0036-466E-B205-FD9877073C8F.html#GUID-E12DF716-0036-466E-B205-FD9877073C8F for more details.