SLVSHX6 December   2024 TPS62966 , TPS62968

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Smart Config (S-CONF)
      2. 6.3.2  Device Enable (EN/SYNC)
      3. 6.3.3  Device Synchronization (EN/SYNC)
      4. 6.3.4  Spread Spectrum Modulation
      5. 6.3.5  Output Discharge
      6. 6.3.6  Undervoltage Lockout (UVLO)
      7. 6.3.7  Power-Good Output
      8. 6.3.8  Noise Reduction and Soft-Start Capacitor (NR/SS)
      9. 6.3.9  Current Limit and Short-Circuit Protection
      10. 6.3.10 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Fixed Frequency Pulse Width Modulation
      2. 6.4.2 Low Duty Cycle Operation
      3. 6.4.3 High Duty Cycle Operation (100% Duty Cycle)
      4. 6.4.4 Second Stage L-C Filter Compensation (Optional)
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Custom Design With WEBENCH® Tools
        2. 7.2.2.2 External Component Selection
          1. 7.2.2.2.1 Switching Frequency Selection
          2. 7.2.2.2.2 Inductor Selection for the First L-C Filter
          3. 7.2.2.2.3 Output Capacitor Selection
          4. 7.2.2.2.4 Ferrite Bead Selection for Second L-C Filter
          5. 7.2.2.2.5 Input Capacitor Selection
          6. 7.2.2.2.6 Setting the Output Voltage
          7. 7.2.2.2.7 Bootstrap Capacitor Selection
          8. 7.2.2.2.8 NR/SS Capacitor Selection
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Third-Party Products Disclaimer
      2. 8.1.2 Development Support
        1. 8.1.2.1 Custom Design With WEBENCH® Tools
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information
7.2.2.2.1 Switching Frequency Selection

The switching frequency can be chosen to optimize efficiency (lower) or ripple noise (higher). Using the higher 700kHz or 1.1MHz setting increases the gain of the feedback loop and can result in lower output noise. However, additional considerations for minimum on-time and duty cycle must also be considered. First, calculate the duty cycle using Equation 3. Higher efficiency results in a shorter on-time, so a conservative approach is to use a higher efficiency than expected in the application.

Equation 3. D = V O U T V I N   ×   η

where:

  • η = estimated efficiency (use the value from the efficiency curves or 0.9 as an conservative assumption)

Then, calculate the on-time with 500kHz, 700kHz, and 1.1MHz using Equation 4. The on-time must always remain above the minimum on-time of 70ns. Use the maximum input voltage and maximum efficiency to determine the minimum duty cycle, Dmin. Use the maximum switching frequency for fSW.

Equation 4. T O N = D m i n f S W _ m i n

then

  • If tON_min minimum < 70ns with 1.1MHz, use 700kHz.
  • If tON_min minimum < 70ns with 700kHz, use 500kHz
  • If tON_min minimum < 70ns with 500kHz, reduce the maximum input voltage.
  • If tON_min minimum ≥ 70ns, use a lower frequency for highest efficiency, or the highest frequency for the lowest noise and ripple.