SLVSFH3B October   2021  – June 2022 TPS631000

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Rating
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics 
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Enable and Soft Start
      3. 7.3.3 Adjustable Output Voltage
      4. 7.3.4 Mode Selection (PFM/FPWM)
      5. 7.3.5 Reverse Current Operation
      6. 7.3.6 Protection Features
        1. 7.3.6.1 Input Overvoltage Protection
        2. 7.3.6.2 Output Overvoltage Protection
        3. 7.3.6.3 Short Circuit Protection
        4. 7.3.6.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design with WEBENCH Tools
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Setting the Output Voltage
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design with WEBENCH Tools
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics 

Over operating junction temperature range and recommended supply voltage range (unless otherwise noted). Typical values are at VI = 3.8 V, VO  = 3.3 V, and TJ = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
ISD Shutdown current into VIN VI = 3.8 V, V(EN) = 0 V TJ = 25°C 0.5 0.9 μA
IQ Quiescent current into VIN VI = 2.2 V, VO = 3.3 V, V(EN) = 2.2 V, no switching 0.15 6.1 μA
Quiescent current into VOUT VI = 2.2 V, VO = 3.3 V, V(EN) = 2.2 V, no switching 8 μA
VIT+ Positive-going UVLO threshold voltage 1.5 1.55 1.599 V
VIT– Negative-going UVLO threshold voltage During start-up 1.4 1.45 1.499 V
Vhys UVLO threshold voltage hysteresis 99   mV
VI(POR)T+ Positive-going POR threshold voltage maximum of VI or VO 1.25 1.45 1.65 V
VI(POR)T- Negative-going POR threshold voltage 1.22 1.43 1.6 V
I/O SIGNALS
VT+ Positive-going threshold voltage EN, MODE 0.77 0.98 1.2 V
VT- Negative-going threshold voltage EN, MODE 0.5 0.66 0.76 V
Vhys Hysteresis voltage EN, MODE 300 mV
IIH High-level input current (EN, MODE) V(EN) = V(MODE) = 1.5 V,
no pullup resistor		 ±0.01 ±0.25 µA
IIL Low-level input current (EN, MODE) V(EN) = V(MODE) = 0 V,
 		 ±0.01 ±0.1 µA
IBais Input bias current (EN, MODE) V(EN) = 5.5 V ±0.01 ±0.3 µA
POWER SWITCH
rDS(on) On-state resistance Q1 VI = 3.8 V, VO = 3.3 V,
test current = 0.2 A		 45 mΩ
Q2 50 mΩ
Q3 50 mΩ
Q4 85 mΩ
IReverse Reverse current into VOUT  VI = 0 V,
VO = 3.3 V,
V(EN) = 0 V		 TJ = 25°C 0.8 2 µA
TJ = –40°C to 125°C 12 µA
CURRENT LIMIT
IL(PEAK) Switch peak current limit (1) Q1 VO =  3.3 V  Output sourcing current 2.6 3 3.35 A
Output sinking current, VI = 3.3  V –0.7 –0.55 –0.45 A
IPFM_entry The output current at PFM mode entry threshold (peak) current (1) IO falling 145 mA
OUTPUT
CONTROL[FEEDBACK PIN]
VFB Reference voltage on feedback pin 495 500 505 mV
PROTECTION FEATURES
VT+(OVP) Positive-going OVP threshold
voltage		 5.55 5.75 5.95 V
VT+(IVP) Positive-going IVP threshold
voltage		 5.55 5.75 5.95 V
TIMING PARAMETERS
td(EN) Delay between a rising edge on the EN pin and the start of the output voltage ramp 0.87 1.5 ms
td(ramp) Soft-start ramp time 6.42 7.55 8.68 ms
fSW Switching frequency 1.8 2 2.2 MHz
(1) Current limit production test are performed under DC conditions. The current limit in operation will be somewhat higher and depend on propagation delay and the applied external components.