SLVSH51
july 2023
TPS631012
,
TPS631013
PRODMIX
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Rating
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical CharacteristicsÂ
7.6
Timing Requirements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Undervoltage Lockout (UVLO)
8.3.2
Enable and Soft Start
8.3.3
Device Enable (EN)
8.3.4
Output Voltage Control
8.3.5
Mode Selection (PFM/FPWM)
8.3.6
Output Discharge
8.3.7
Reverse Current Operation
8.3.8
Protection Features
8.3.8.1
Input Overvoltage Protection
8.3.8.2
Output Overvoltage Protection
8.3.8.3
Short Circuit Protection/Hiccup
8.3.8.4
Thermal Shutdown
8.4
Device Functional Modes
8.5
Programming
8.5.1
Serial Interface Description
8.5.2
Standard-, Fast-, and Fast-Mode Plus Protocol
8.5.3
I2C Update Sequence
8.6
Register Map
8.6.1
Register Description
8.6.1.1
Register Map
8.6.1.2
Register CONTROL1 (Register address: 0x02; Default: 0x08)
8.6.1.3
Register VOUT (Register address: 0x03; Default: 0x5C)
8.6.1.4
Register CONTROL2 (Register address: 0x05; Default: 0x45)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Inductor Selection
9.2.2.2
Output Capacitor Selection
9.2.2.3
Input Capacitor Selection
9.2.2.4
Setting the Output Voltage
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Receiving Notification of Documentation Updates
10.3
Support Resources
10.4
Trademarks
10.5
Electrostatic Discharge Caution
10.6
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YBG|8
MXBG432
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsh51_oa
slvsh51_pm
8.2
Functional Block Diagram