SLVSH51A July   2023  – January 2025 TPS631012 , TPS631013

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Rating
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics 
    6. 6.6 Timing Requirements
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO)
      2. 7.3.2 Enable and Soft Start
      3. 7.3.3 Device Enable (EN)
      4. 7.3.4 Output Voltage Control
      5. 7.3.5 Mode Selection (PFM/FPWM)
      6. 7.3.6 Output Discharge
      7. 7.3.7 Reverse Current Operation
      8. 7.3.8 Protection Features
        1. 7.3.8.1 Input Overvoltage Protection
        2. 7.3.8.2 Output Overvoltage Protection
        3. 7.3.8.3 Short Circuit Protection/Hiccup
        4. 7.3.8.4 Thermal Shutdown
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, and Fast-Mode Plus Protocol
      3. 7.5.3 I2C Update Sequence
    6. 7.6 Register Map
      1. 7.6.1 Register Description
        1. 7.6.1.1 Register Map
        2. 7.6.1.2 Register CONTROL1 (Register address: 0x02; Default: 0x08)
        3. 7.6.1.3 Register VOUT (Register address: 0x03; Default: 0x5C)
        4. 7.6.1.4 Register CONTROL2 (Register address: 0x05; Default: 0x45)
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Setting the Output Voltage
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)

5 Pin Configuration and Functions

TPS631012 TPS631013 8-Pin YBG WCSP Package(Top View) Figure 5-1 8-Pin YBG WCSP Package(Top View)
Table 5-1 Pin Functions
PINI/O(1)DESCRIPTION
NAMENO.
VIN

A1

PWRSupply input voltage

EN

A2

IDevice enable. Set high to enable and low to disable. It must not be left floating.
LX1

B1

PWRInductor switching node of the buck stage
SDAB2II2C serial interface data. Pull this pin up to the I2C bus voltage with a resistor.
LX2

C1

PWRInductor switching node of the boost stage

GND

C2

PWRPower ground

VOUT

D1

PWRPower stage output

SCL

D2

I

I2C serial interface clock. Pull this pin up to the I2C bus voltage with a resistor.
(1) PWR = power, I = input