SLVSD44A September   2017  – July 2018 TPS63710

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application
      2.      Efficiency vs output current for VOUT = -1.8V
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. Table 1. Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Low Noise Reference System
      2. 7.3.2 Duty Cycle
      3. 7.3.3 Enable
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
      6. 7.3.6 Power Good Output
    4. 7.4 Device Functional Modes
      1. 7.4.1 Soft-Start
      2. 7.4.2 VOUT Discharge
      3. 7.4.3 Current Limit
      4. 7.4.4 CCP Capacitor Precharge
      5. 7.4.5 PWM Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Setting the Output Voltage
        3. 8.2.2.3 Inductor Selection
        4. 8.2.2.4 Capacitor Selection
          1. 8.2.2.4.1 CCP Capacitor
          2. 8.2.2.4.2 Input Capacitor
          3. 8.2.2.4.3 Output Capacitor
      3. 8.2.3 Application Curves
        1. 8.2.3.1 Parameter Measurement Information
    3. 8.3 System Examples
      1. 8.3.1 Typical Application for Powering the Negative Rail of a Gallium Nitride (GaN) Power Amplifier
      2. 8.3.2 Typical Application for Powering the Negative Rail of an ADC or DAC
      3. 8.3.3 Typical Application for Laser Diode Bias
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Custom Design With WEBENCH® Tools
      2. 11.1.2 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.6 Power Good Output

The TPS63710 has a built-in power good (PG) output to indicate whether or not the output voltage is in regulation. The PG signal can be used for startup sequencing of multiple rails. The PG pin is an open-drain output that requires a pull-up resistor to any positive voltage up to 5.5 V. It can sink 1 mA of current and maintain its specified logic low level. PG is low when the device is turned off due to EN = low, undervoltage lockout, or thermal shutdown. There is a typical de-glitch time of 10 µs on the power good output. The minimum VIN to drive the PG pin properly is typically 2 V. If not used, the PG pin may be left floating or connected to GND.

VAUX may be used to pull-up the PG pin, but the pull-up resistor must be chosen such that the maximum load of 100 µA on VAUX is not exceeded.

During start-up, the power good signal is gated by the soft-start circuit such that the output is held low as long as the soft-start is ongoing.

Table 2. Power Good Pin Logic Table

EN device status PG state
X VIN < 2 V high impedance
low VIN ≥ 2 V low
high 2 V ≤ VIN < UVLO OR in thermal shutdown OR VOUT not in regulation low
high VOUT in regulation high impedance