SLVSGC1B December   2021  – August 2024 TPS63901

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Trapezoidal Current Control
      2. 6.3.2 Device Enable and Disable
      3. 6.3.3 Soft Start
      4. 6.3.4 Input Current Limit
      5. 6.3.5 Dynamic Voltage Scaling
      6. 6.3.6 Device Configuration (Resistor-to-Digital Interface)
      7. 6.3.7 SEL Pin
      8. 6.3.8 Short-Circuit Protection
        1. 6.3.8.1 Current Limit Setting = 'Unlimited'
        2. 6.3.8.2 Current Limit Setting = 1 mA to 100 mA
      9. 6.3.9 Thermal Shutdown
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Inductor Selection
        2. 7.2.2.2 Output Capacitor Selection
        3. 7.2.2.3 Input Capacitor Selection
        4. 7.2.2.4 Setting The Output Voltage
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • YCJ|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.3.6 Device Configuration (Resistor-to-Digital Interface)

The device has three configuration pins (CFG1, CFG2, and CFG3) that control its operation. When the device starts up, a resistor-to-digital (R2D) interface reads the values of the configuration resistors on the CFG pins and transfers the setting to an internal configuration register (see Figure 6-12).

  • CFG1 and CFG2 set VO(2) level and the input current limit.
  • CFG3 sets VO(1) level.

To reduce power consumption, the device reads the value of the resistors connected to the configuration pins during start-up and then disables these pins. Once the device has started to operate, changes to the configuration pins have no effect.

TPS63901 Resistor-to-Digital Interface Block DiagramFigure 6-12 Resistor-to-Digital Interface Block Diagram

Table 6-2 summarizes the resistor values needed to configure the device for different input current limit and output voltage (SEL = high) settings. For correct operation, use resistors with a tolerance of ±1% or better and a temperature coefficient of ±200 ppm or better.

Note:

For correct operation, TI recommends that the total RMS error of the configuration resistors – including initial tolerance, temperature drift, and aging – is less than ±3%.

Table 6-2 Input Current Limit and Output Voltage (SEL = High) Settings
Output Voltage – VO(2)
(SEL = HIGH)		Input Current Limit
UNLIMITED100 mA50 mA25 mA10 mA5 mA2.5 mA1 mA
1.8 VRCFG10 Ω
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
1.9 VRCFG1511 Ω
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.0 VRCFG11.15 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.1 VRCFG11.87 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.2 VRCFG12.74 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.3 VRCFG13.83 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.4 VRCFG15.11 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.5 VRCFG16.49 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.6 VRCFG18.25 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.7 VRCFG110.5 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.8 VRCFG113.3 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
2.9 VRCFG116.2 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
3.0 VRCFG120.5 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
3.1 VRCFG124.9 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
3.2 VRCFG130.1 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
3.3 VRCFG136.5 kΩ
RCFG20 Ω511 Ω1.15 kΩ1.87 kΩ2.74 kΩ3.83 kΩ5.11 kΩ6.49 kΩ
3.4 VRCFG10 Ω
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
3.5 VRCFG1511 Ω
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
3.6 VRCFG11.15 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
3.7 VRCFG11.87 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
3.8 VRCFG12.74 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
3.9 VRCFG13.83 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.0 VRCFG15.11 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.1 VRCFG16.49 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.2 VRCFG18.25 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.3 VRCFG110.5 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.4 VRCFG113.3 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.5 VRCFG116.2 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.6 VRCFG120.5 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.7 VRCFG124.9 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
4.8 VRCFG130.1 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ
5.0 VRCFG136.5 kΩ
RCFG28.25 kΩ10.5 kΩ13.3 kΩ16.2 kΩ20.5 kΩ24.9 kΩ30.1 kΩ36.5 kΩ

Table 6-3 summarizes the resistor values needed to configure the device for different output voltage (SEL = low) settings. For correct operation, use resistors with a tolerance of ±1% or better and a temperature coefficient of better than ±200 ppm.

Table 6-3 Output Voltage (SEL Pin = Low) Settings
Output Voltage – VO(1)
(SEL = LOW)		RCFG3
1.8 V0 Ω
2.0 V511 Ω
2.1 V1.15 kΩ
2.2 V1.87 kΩ
2.3 V2.74 kΩ
2.4 V3.83 kΩ
2.5 V5.11 kΩ
2.6 V6.49 kΩ
2.7 V8.25 kΩ
2.8 V10.5 kΩ
3.0 V13.3 kΩ
3.3 V16.2 kΩ
3.6 V20.5 kΩ
4.0 V24.9 kΩ
4.5 V30.1 kΩ
5.0 V36.5 kΩ