SLVSGC1B December 2021 – August 2024 TPS63901
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|---|---|
SUPPLY | ||||||||
IQ | Quiescent current into VIN | V(EN) =
3 V, no load, not switching, "unlimited" current setting; TJ = –40°C to 85°C |
0.075 | 1 | µA | |||
ISD | Shutdown current into VIN | V(EN) = 0 V ; TJ = –40°C to 85°C | 60 | nA | ||||
VIT+(UVLO) | Positive-going UVLO threshold voltage | 1.73 | 1.75 | 1.77 | V | |||
Vhys(UVLO) | UVLO threshold voltage hysteresis | 90 | 100 | 110 | mV | |||
VIT+(POR) | Positive-going POR threshold voltage | 1.37 | 1.74 | V | ||||
I/O SIGNALS | ||||||||
VIH | High-level input voltage (EN, SEL) | 1.2 | V | |||||
VIL | Low-level input voltage (EN, SEL) | 0.4 | V | |||||
Input current (EN, SEL) | V(EN), V(SEL) = 1.8 V or 0 V | ±1 | ±10 | nA | ||||
POWER SWITCH | ||||||||
rDS(on) | On-state resistance | Q1 | VI = 3 V, VO = 5 V, test current = 1 A | 140 | mΩ | |||
Q2 | VI = 3 V, VO = 3 V, test current = 1 A | 95 | ||||||
Q3 | VI = 3 V, VO = 3 V, test current = 1 A | 95 | ||||||
Q4 | VI = 5 V, VO = 3 V, test current = 1 A | 140 | ||||||
CURRENT LIMIT | ||||||||
Peak current limit during start-up (Q1) | VI = 3.6 V, unlimited current limit setting |
0.35 |
0.83 | A | ||||
Peak current limit (Q1) | VI = 1.8 V, VO = 3.6 V, unlimited current limit setting |
1.33 | 1.45 | 1.6 |
A | |||
VI = 3.6 V, VO = 3.3 V, 100-mA current limit setting |
0.15 | 0.29 |
0.51 | |||||
Average input current limit | TJ = –40°C to 85°C | 1-mA setting | 1 | mA | ||||
2.5-mA setting | 2.5 | |||||||
5-mA setting | 5 | |||||||
10-mA settting | 10 | |||||||
25-mA setting | 25 | |||||||
50-mA setting | 50 | |||||||
100-mA setting | 100 | |||||||
OUTPUT | ||||||||
Output voltage DC accuracy | IO = 1 mA, CO(eff) = 10 µF, L(eff) = 2.2 µH | ±1.5% | ||||||
CONTROL | ||||||||
Internal reference resistor | 33 | kΩ | ||||||
RCFG | R2D setting #0 | 0 | 0.1 | kΩ | ||||
R2D setting #1 | –3% | 0.511 | +3% | |||||
R2D setting #2 | –3% | 1.15 | +3% | |||||
R2D setting #3 | –3% | 1.87 | +3% | |||||
R2D setting #4 | –3% | 2.74 | +3% | |||||
R2D setting #5 | –3% | 3.83 | +3% | |||||
R2D setting #6 | –3% | 5.11 | +3% | |||||
R2D setting #7 | –3% | 6.49 | +3% | |||||
R2D setting #8 | –3% | 8.25 | +3% | |||||
R2D setting #9 | –3% | 10.5 | +3% | |||||
R2D setting #10 | –3% | 13.3 | +3% | |||||
R2D setting #11 | –3% | 16.2 | +3% | |||||
R2D setting #12 | –3% | 20.5 | +3% | |||||
R2D setting #13 | –3% | 24.9 | +3% | |||||
R2D setting #14 | –3% | 30.1 | +3% | |||||
R2D setting #15 | –3% | 36.5 | +3% | |||||
PROTECTION FEATURES | ||||||||
Thermal shutdown threshold temperature | 140 | 150 | 160 | °C | ||||
Thermal shutdown hysteresis | 15 | 20 | 25 | °C | ||||
TIMING PARAMETERS | ||||||||
td(POR) | POR signal delay after reaching POR threshold | 3.8 | ms | |||||
td(EN) | Delay between a rising edge on the EN pin and the start of the output voltage ramp | Supply voltage stable before EN pin goes high | 1.5 | ms | ||||
tw(SS) | Soft-start step duration | VO > 1.8 V | 100 | 125 | 150 | µs | ||
td(SEL) | Delay between a change in the state of the SEL pin and the first step change in the output voltage | 30 | 40 | µs | ||||
tw(DVS) | Dynamic voltage scaling step duration | 100 | 125 | 150 | µs | |||
td(RESTART) | Restart delay after protection | 10 | 11 | ms |