The TPS650830 is a single-chip solution Power Management IC designed specifically for the latest Intel Processors targeted for Tablets, Ultrabooks, and Notebooks with NVDC or non-NVDC power architectures, using 2S, 3S, or 4S Lithium-Ion battery packs.
The TPS650830 is used for Volume systems with the low voltage rails merged for the smallest footprint and lowest cost system power solution.
The TPS650830 can provide the complete power solution based on the Intel Reference Designs. Five highly efficient step-down voltage regulators (VRs) and a sink/source LDO, are used along with power-up sequence logic managing external load switches to provide the proper power rails, sequencing, and protection - including DDR3 and DDR4 memory power. The regulators support dynamic voltage scaling (DVS) for maximum efficiency including Connected Standby. The high frequency voltage regulators use small inductors and capacitors to achieve a small solution size. Output power is adjustable on four VR controllers. An I2C interface allows simple control by the embedded controller (EC). Each version is available in a 7x7 NFBGA package and a 9x9 NFBGA package. The 7x7 NFBGA package can be used in Type 4 PCB boards for the smallest area implementation. The 9x9 NFBGA package can be used in Type 3 and Type 4 PCB boards allowing to minimize cost and area.
For the Skylake and Kabylake Power Map implementation, the five PMIC voltage regulators and LDO1 are assigned with the low-voltage rails merged or split according to the configuration. For the Volume (merged low voltage rails) configuration six external load switches are controlled and monitored by using six powergood comparator logic blocs.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS650830 | NFBGA (168) | 7.00 mm x 7.00 mm |
NFBGA (159) | 9.00 mm x 9.00 mm |
Changes from * Revision (December 2014) to A Revision
TPS650830 | Skylake and Kabylake PLATFORM POWER SYSTEM VOLTAGE RAIL VOLUME (Merged Low Voltage Rails) |
OUTPUT VOLTAGE, Vout DEFAULT, or COMPARATOR INPUT | SWITCHING FREQUENCY, Fsw
NVDCZ = 1 / 0 |
LPM VOLTAGE, Vout
Default |
POWER GOOD OUTPUT SETTING, (PGVRx or PGx is PP or OD) |
---|---|---|---|---|---|
VR1 | V1.00A / V 0.85A | 1.00 V | 500 kHz / 800 kHz | LPM = 1.00 V | PP |
VR2 | V1.8A | 1.8 V | 2 MHz / 2 MHz | LPM = 1.8 V | PP |
VR3 | V3.3A_DSW | 3.3 V | 800 kHz / 800 kHz | LPM = 3.3 V | PP |
VR4 | V1.2U | 1.2 V,1.35 V,1.1 V | 500 kHz / 800 kHz | LPM = 1.2 V,1.35 V,1.1 V | OD |
VR5 | V5A_DS3 | 5 V | 800 kHz / 800 kHz | LPM = 5.0 V | PP |
LDO1 | V0.6Dx | 0.6 V, 0.675 V, 0.55 V | - | LPM = DDR_VTT_ CTRL = Off |
NA |
External VR_a | none | - | - | - | -- |
External VR_b | none | - | - | - | -- |
Powergood Comparator Logic a | V3.3A_PCH Enable/Sense External Load Switch | 3.3 V, Comparator Analog Input | – | – | PP |
Powergood Comparator Logic b | V1.8U_2.5U Enable/Sense External Load Switch | 1.8 V, Comparator Analog Input | – | – | PP |
Powergood Comparator Logic c | Generic Comparator | - Comparator Disabled | – | – | - |
Powergood Comparator Logic d | VCCIO Enable/Sense External Load Switch | 1.00 V, Comparator Analog Input | – | – | PP |
Powergood Comparator Logic e | V3.3S Sense External Load Switch | 3.3 V, Comparator Analog Input | – | – | PP |
Powergood Comparator Logic f | V1.8S Sense External Load Switch | 1.8 V, Comparator Analog Input | – | – | PP |
Powergood Comparator Logic g | V1.0S Sense External Load Switch | 1.00 V, Comparator Analog Input | – | – | OD |