SWCS142 July 2018 TPS650861
PRODUCTION DATA.
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|---|
Bit Name | GPO4_LVL | GPO3_LVL | GPO2_LVL | GPO1_LVL | VTT_EN | SWB2_LDOA1_EN | SWB1_EN | LDOA3_EN |
TPS65086100 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7 | GPO4_LVL | R/W | X | The field is to set GPO4 pin output if the pin is factory-configured as an I2C controlled open-drain general-purpose output.
0: The pin is driven to logic low. 1: The pin is driven to logic high. —: Bit not used in this version; GPO4 is controlled by GPO4 PG tree. Default is set to 0b. |
6 | GPO3_LVL | R/W | X | The field is to set GPO3 pin output if the pin is factory-configured as either an I2C controlled open-drain or a push-pull general-purpose output.
0: The pin is driven to logic low. 1: The pin is driven to logic high. —: Bit not used in this version; GPO3 is controlled by GPO3 PG tree. Default is set to 0b. |
5 | GPO2_LVL | R/W | X | The field is to set GPO2 pin output if the pin is factory-configured as either an I2C controlled open-drain or a push-pull general-purpose output.
0: The pin is driven to logic low. 1: The pin is driven to logic high. —: Bit not used in this version; GPO2 is controlled by GPO2 PG tree. Default is set to 0b. |
4 | GPO1_LVL | R/W | X | The field is to set GPO1 pin output if the pin is factory-configured as either an I2C controlled open-drain or a push-pull general-purpose output.
0: The pin is driven to logic low. 1: The pin is driven to logic high. —: Bit not used in this version; GPO1 is controlled by GPO1 PG tree. Default is set to 0b. |
3 | VTT_EN | R/W | X | VTT LDO I2C Enable
0: VTT LDO is enabled or disabled by one of the control input pins or internal PG signals. 1: VTT LDO is forced on unless VTT_DIS = 0b. |
2 | SWB2_LDOA1_EN | R/W | X | SWB2 or LDOA1 I2C Enable. Internal setting selects either SWB2 or LDOA1.
0: SWB2 or LDOA1 is enabled or disabled by one of the control input pins or internal PG signals. 1: SWB2 or LDOA1 is forced on unless SWB2_LDOA1_DIS = 0b. SWB2 for: OTP Dependent LDOA1 for: OTP Dependent |
1 | SWB1_EN | R/W | X | SWB1 I2C Enable
0: SWB1 is enabled or disabled by one of the control input pins or internal PG signals. 1: SWB1 is forced on unless SWB1_DIS = 0b. |
0 | LDOA3_EN | R/W | X | LDOA3 I2C Enable
0: LDOA3 is enabled or disabled by one of the control input pins or internal PG signals. 1: LDOA3 is forced on unless LDOA3_DIS = 0b. |