3 |
COLDOFF |
R/W |
0 |
Set by PMIC cleared by host. Host writes 1 to this bit to clear it.
0 = Cleared
1 = PMIC was shut down by host through PMIC_EN pin. |
2 |
UVLO |
R/W |
0 |
Set by PMIC cleared by host. Host writes 1 to this bit to clear it.
0 = Cleared
1 = PMIC was shut down due to a UVLO event (VSYS less 5.4 V). The setting of this bit sets the ONOFFSRC bit in the PMIC_IRQ register. |
1 |
OCP |
R/W |
0 |
Set by PMIC cleared by host. Host writes 1 to this bit to clear it.
0 = Cleared
1 = PMIC shut down due to a power fault event. The setting of this bit sets the ONOFFSRC bit in the PMIC_IRQ register. |
0 |
CRITTEMP |
R/W |
0 |
Set by PMIC cleared by host. Host writes 1 to this bit to clear it.
0 = Cleared
1 = PMIC shut down due to the rise of PMIC die temperature above critical temperature threshold (TCRIT). The setting of this bit sets the ONOFFSRC bit in the PMIC_IRQ register. |