SLVS496D SEPTEMBER   2003  – August 2016 TPS65100 , TPS65101 , TPS65105

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Main Boost Converter
      2. 8.3.2  VCOM Buffer
      3. 8.3.3  Enable and Power-On Sequencing
      4. 8.3.4  Positive Charge Pump
      5. 8.3.5  Negative Charge Pump
      6. 8.3.6  Linear Regulator Controller
      7. 8.3.7  Soft Start
      8. 8.3.8  Fault Protection
      9. 8.3.9  Thermal Shutdown
      10. 8.3.10 Linear Regulator Controller
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable
      2. 8.4.2 Fault Mode
        1. 8.4.2.1 Overvoltage Protection
        2. 8.4.2.2 Short-Circuit Protection
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Boost Converter Design Procedure
          1. 9.2.2.1.1 Inductor Selection
          2. 9.2.2.1.2 Output Capacitor Selection
          3. 9.2.2.1.3 Input Capacitor Selection
          4. 9.2.2.1.4 Rectifier Diode Selection
          5. 9.2.2.1.5 Converter Loop Design and Stability
          6. 9.2.2.1.6 Design Procedure Quick Steps
          7. 9.2.2.1.7 Setting the Output Voltage and Selecting the Feedforward Capacitor
        2. 9.2.2.2 Negative Charge Pump
        3. 9.2.2.3 Positive Charge Pump
        4. 9.2.2.4 VCOM Buffer
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Notebook Supply
      2. 9.3.2 Monitor Supply
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Performance
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
  • PWP|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

PWP Package
24-Pin HTSSOP
(Top View)
TPS65100 TPS65101 TPS65105 PWP_package_sop_pin_diagram.gif
RGE Package
24-Pin VQFN
(Top View)
TPS65100 TPS65101 TPS65105 RGE_Package_qfn_pin_diagram.gif

Pin Functions

PIN I/O DESCRIPTION
NAME HTSSOP VQFN
BASE 3 6 O Base drive output for the external transistor. If Linear Regulator is not needed pull this pin against VIN.
C1+ 16 19 — Positive terminal of the charge pump flying capacitor
C1- 17 20 — Negative terminal of the charge pump flying capacitor
C2+ 14 17 — Positive terminal for the charge pump flying capacitor. If the device runs in voltage doubler mode, this pin should be left open.
C2-/MODE 15 18 — Negative terminal of the charge pump flying capacitor and charge pump MODE pin. If the flying capacitor is connected to this pin, the converter operates in a voltage tripler mode. If the charge pump needs to operate in a voltage doubler mode, the flying capacitor is removed and the C2-/MODE pin should be connected to GND.
COMP 22 1 — Compensation pin for the main boost converter. A small capacitor is connected to this pin.
DRV 18 21 O External charge pump driver
EN 24 3 I Enable pin of the device. This pin should be terminated and not be left floating. A logic high enables the device and a logic low shuts down the device.
ENR 23 2 I Enable pin of the linear regulator controller. This pin should be terminated and not be left floating. Logic high enables the regulator and a logic low puts the regulator in shutdown.
FB1 1 4 I Feedback pin of the boost converter
FB2 21 24 I Feedback pin of negative charge pump
FB3 12 15 I Feedback pin of positive charge pump
FB4 2 5 I Feedback pin of the linear regulator controller. The linear regulator controller is set to a fixed output voltage of 3.3 V or 3 V depending on the version.
GND 19 22 — Ground
OUT3 13 16 O Positive charge pump output
PGND 7, 8 10, 11 — Power ground
REF 20 23 O Internal reference output typically 1.23 V
SUP 9 12 I Supply pin of the positive, negative charge pump, boost converter gate drive circuit, and VCOM buffer. This pin should be connected to the output of the main boost converter and cannot be connected to any other voltage source. For performance reasons, it is not recommended for a bypass capacitor to be connected directly to this pin.
SW 5, 6 8, 9 — Switch pin of the boost converter
VCOM 10 13 O VCOM buffer output
VCOMIN 11 14 I Positive input terminal of the VCOM buffer. When the VCOM buffer is not used, this terminal can be connected to GND to reduce the overall quiescent current of the IC.
VIN 4 7 I Input voltage pin of the device
PowerPAD™/
Thermal Die		 — — — The PowerPAD or exposed thermal die needs to be connected to the power ground pins (PGND)