Refer to the PDF data sheet for device specific package drawings
The TPS6513x device is a dual-output DC-DC converter supply that generates a positive output up to 15 V and a negative output down to –15 V. The converter maintains low output voltage ripple. Typically, the maximum output currents are in the 200-mA to 500-mA range, depending on input voltage to output voltage ratio and the current limit option. The combined (VPOS and VNEG) efficiency reaches 85% to keep systems cool or achieve a longer battery-on-time. The input voltage range of 2.7 V to 5.5 V allows the devices to be powered from batteries or from fixed 3.3-V or 5-V rails.
The converter operates with a fixed frequency PWM control topology and, when operating in power-save mode, uses a pulse-skipping mode at light-load currents. It operates with only 500-µA device quiescent current.
Independent enable pins allow flexible power-up and power-down sequencing for both outputs. The positive and negative outputs operate independently, allowing for non-symmetrical output voltages and currents.
The converter has an internal current limit, overvoltage protection, and a thermal shutdown for highest reliability under fault conditions. The converter is available in a 4-mm × 4-mm VQFN-24 package. The solution size is small with a minimum switching frequency of 1.25 MHz for smaller inductors and few other external components required.
PART NUMBER | PACKAGE(1) | BODY SIZE (NOM) |
---|---|---|
TPS65130 | VQFN (24) | 4.00 mm × 4.00 mm |
TPS65131 |
Changes from Revision D (January 2016) to Revision E (April 2022)
Changes from Revision C (June 2015) to Revision D (January 2016)
Changes from Revision B (September 2004) to Revision C (March 2015)
PIN | TYPE | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
AGND | 19 | — | Analog ground pin |
BSW | 7 | O | Gate control pin for external battery switch. This pin goes low when ENP is set high. |
CN | 18 | — | Compensation pin for inverting converter control |
CP | 21 | — | Compensation pin for boost converter control |
ENN | 10 | I | Enable pin for the negative output voltage (0 V: disabled, VIN: enabled) |
ENP | 8 | I | Enable pin for the positive output voltage (0 V: disabled, VIN: enabled) |
FBN | 16 | I | Feedback pin for the negative output voltage divider |
FBP | 22 | I | Feedback pin for the positive output voltage divider |
INN | 5, 6 | I | Inverting converter switch input |
INP | 1, 24 | I | Boost converter switch input. |
NC | 12, 20 | — | Not connected |
OUTN | 13, 14 | O | Inverting converter switch output. |
PGND | 2, 3 | — | Power ground pin |
PSN | 11 | I | Power-save mode enable for inverter stage (0 V: disabled, VIN: enabled) |
PSP | 9 | I | Power-save mode enable for boost converter stage (0 V: disabled, VIN: enabled) |
VIN | 4 | I | Control supply input |
VNEG | 15 | I | Negative output voltage sense input |
VPOS | 23 | I | Positive output voltage sense input |
VREF | 17 | O | Reference output voltage. Bypass this pin with a 220-nF capacitor to ground. Connect the lower resistor of the negative output voltage divider to this pin |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VIN, INN | Input voltage at pins (2) | –0.3 | 6 | V |
VPOS | Maximum voltage at pin (2) | –0.3 | 17 | V |
VNEG | Minimum voltage at pin (2) | –17 | VIN + 0.3 | V |
Voltage at pins ENN, ENP, FBP, FBN, CN, CP, PSP, PSN, BSW (2) | –0.3 | VIN + 0.3 | V | |
INP | Input voltage at pin (2) | –0.3 | 17 | V |
Differential voltage between pins OUTN to VINN(2) | –0.3 | 24 | V | |
TJ | Operating virtual junction temperature | –40 | 150 | °C |
TSTG | Storage temperature | –65 | 150 | °C |