SLVSBB2F May   2012  – August 2024 TPS65131-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Conversion
      2. 7.3.2 Control
      3. 7.3.3 Output Rails Enable or Disable
      4. 7.3.4 Load Disconnect
      5. 7.3.5 Soft Start
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Overtemperature Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Save Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 TPS65131-Q1 With VPOS = 10.5V, VNEG = –10V
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Programming the Output Voltage
          1. 8.2.3.1.1 Boost Converter
          2. 8.2.3.1.2 Inverting Converter
          3. 8.2.3.1.3 Inductor Selection
        2. 8.2.3.2 Capacitor Selection
          1. 8.2.3.2.1 Input Capacitor
          2. 8.2.3.2.2 Output Capacitors
        3. 8.2.3.3 Rectifier Diode Selection
        4. 8.2.3.4 External P-MOSFET Selection
        5. 8.2.3.5 Stabilizing the Control Loop
          1. 8.2.3.5.1 Feedforward Capacitors
          2. 8.2.3.5.2 Compensation Capacitors
      4. 8.2.4 Analog Supply Input Filter
        1. 8.2.4.1 RC-Filter
        2. 8.2.4.2 LC-Filter
      5. 8.2.5 Thermal Information
      6. 8.2.6 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
    1. 11.1 Mechanical Data
    2. 11.2 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

This specification applies over the full recommended input voltage range VI = 2.7V to 5.5V and over the temperature range TJ = –40°C to 125°C unless otherwise noted. Typical values apply for VI = 3.6V and TJ = 25°C.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
DC-DC STAGE (V(VPOS), V(VNEG))
VrefReference voltageIref = 10µA1.21.2131.225V
I(FBP)Positive feedback input bias currentV(FBP) = Vref50nA
I(FBN)Negative feedback input bias currentV(FBN) = 0.1Vref50nA
V(FBP)Positive feedback regulation voltage1.1891.2131.237V
V(FBN)Negative feedback regulation voltage–0.02400.024V
Total output dc accuracy3%
rDS(on)(N)Inverter switch on-resistanceV(VIN) = 3.6V440620mΩ
V(VIN) = 5V330530
I(LIM-N)Inverter switch current limitV(VIN) = 3.6V170019502200mA
rDS(on)(P)Boost switch on-resistanceV(POS) = 5V230390mΩ
V(POS) = 10V170230
I(LIM-P)Boost switch current limitV(VIN) = 3.6V, V(POS) = 8V170019502250mA
CONTROL STAGE
VIHHigh-level input voltage, ENP, ENN, PSP, PSN1.4V
VILLow-level input voltage, ENP, ENN, PSP, PSN0.4V
Input current, ENP, ENN, PSP, PSNENP, ENN, PSP, PSN connected to GND or VIN0.010.1µA
R(BSW)Output resistance27kΩ
IQQuiescent currentVINV(VIN) = 3.6V, I(POS) = I(NEG) = 0,
ENP = ENN = PSP = PSN = V(VIN),
V(POS) = 8V, V(NEG) = –5V		300500µA
VPOS100120
VNEG100120
ISDShutdown supply currentENN = ENP = LOW, TA = –40°C to 85°C0.21.5µA
V(UVLO)Undervoltage lockout threshold2.12.352.7V
T(TS)Thermal shutdown150°C
T(TS-HYS)Thermal shutdown hysteresisJunction temperature decreasing5°C