SLVSGA0B May 2022 – June 2024 TPS65219
PRODUCTION DATA
Input Capacitance - LDO1, LDO2
LDO inputs require an input decoupling capacitor to minimize input ripple voltage. Using a typical of 2.2-µF capacitance for each LDO is recommended. Depending on the input voltage of the LDO, a 6.3 V or higher rated capacitor can be used. The same input capacitance requirements applies when the LDO is configured as LDO, bypass or "load-switch.
Output Capacitance - LDO1, LDO2
LDO outputs require an output capacitor to hold up the output voltage during a load step or changes to the input voltage. Using a 2.2-µF local capacitance for each LDO output with ESR of 10 mΩ or less is recommended. Local capacitance must not exceed 4uF (after derating). This requirement excludes any capacitance seen at the load and only refers to the capacitance seen close to the device. The total capacitance (local + point of load) that each LDO can support depends on the NVM configuration. Table 8-3 shows the maximum total output capacitance allowed based on the rail configuration. Refer to the Technical Reference Manual (TRM) for the specific orderable part number to identify the LDO configuration based on the register settings and the applicable max total capacitance.
Register setting | LDO config | Max total capacitance (2.2uF local + point of load) | |
---|---|---|---|
LDOx_LSW_CONFIG | LDOx_BYP_CONFIG | ||
0 | 0 | LDO | 20uF |
0 | 1 | Bypass | 50uF |
1 | X | Load-switch | 50uF |