SLVSDP1F january   2017  – may 2023 TPS65235-1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  Linear Regulator and Current Limit
      3. 7.3.3  Boost Converter Current Limit
      4. 7.3.4  Charge Pump
      5. 7.3.5  Slew Rate Control
      6. 7.3.6  Short-Circuit Protection, Hiccup, and Overtemperature Protection
      7. 7.3.7  Tone Generation
      8. 7.3.8  Tone Detection
      9. 7.3.9  Audio Noise Rejection
      10. 7.3.10 Disable and Enable
      11. 7.3.11 Component Selection
        1. 7.3.11.1 Boost Inductor
        2. 7.3.11.2 Capacitor Selection
        3. 7.3.11.3 Surge Components
        4. 7.3.11.4 Consideration for Boost Filtering and LNB Noise
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 TPS65235-1 I2C Update Sequence
    6. 7.6 Register Maps
      1. 7.6.1 Control Register 1 (address = 0x00) [reset = 0x08]
      2. 7.6.2 Control Register 2 (address = 0x01) [reset = 0x09]
      3. 7.6.3 Status Register (address = 0x02) [reset = 0x29]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DiSEqc1.x Support
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DiSEqc2.x Support
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1.3 Application Curves

TA = 25°C, VIN = 12 V, fSW = 1 MHz, CBoost = (2 × 22 µF / 35 V) (unless otherwise noted)

GUID-93B68F05-185A-4EDB-8E8A-1F2480FCE7B6-low.png
VVLNB = 13.4 V
Figure 8-2 Soft Start, Delay from EN High to LNB Output High
GUID-CCB11A0A-64B9-421A-8F4A-3819FFCF244C-low.png
VVLNB = 18.2 V
Figure 8-4 Soft-Start, Delay from EN High to LNB Output High
GUID-7532B8E6-E33E-4A42-B9D4-E5F5888F481A-low.png
EN = 0bVVLNB =13.4 V
Figure 8-6 Soft Start, Delay From I2C Enable (I2C_CON = 1b) to LNB Output High
GUID-5E542367-1A9E-4561-AF66-B57A97E7B4DE-low.png
VVLNB = 13.4 V
Figure 8-8 No Load, 22-kHz Tone Output
GUID-3379AC49-11E3-45AB-AF7F-DBA7C8A64E98-low.png
VVLNB = 18.2 V
Figure 8-10 No Load, 22-kHz Tone Output
GUID-E3AD734D-B9B9-48F1-AAE2-7239FB336AB5-low.png
Figure 8-12 No load, 22-kHz Tone Delay from EXTM 22-kHz Input Turns High to Output Tone On
GUID-8E167C9E-1433-4AFA-8A1A-C7544BDE9683-low.png
Figure 8-14 No Load, 22-kHz Tone Delay from EXTM Tone Envelop Input Turns High to Output Tone On
GUID-7D9AF23D-39D8-4478-8C53-6BE89E384113-low.png
Figure 8-16 No Load, 44-kHz Tone Delay from EXTM 22-kHz Input Turns High to Output Tone On
GUID-AF85CCAB-7791-491F-AAAA-02B8506CDB11-low.png
VVLNB = 13.4 V
Figure 8-3 Disabled, Delay from EN Low to LNB Output Low
GUID-55C440FE-E554-4F37-8B5B-696721840401-low.png
VVLNB = 18.2 V
Figure 8-5 Disabled, Delay From EN Low to LNB Output Low
GUID-55497A9F-349B-45FC-96DF-8881799364BF-low.png
EN = 0bVVLNB = 13.4 V
Figure 8-7 Delay From I2C Disable (I2C_CON = 0b) to LNB Output Low
GUID-24B09EBB-48E3-479A-9709-6E0E2A2A941B-low.png
VVLNB = 13.4 V
Figure 8-9 950-mA Load, 22-kHz Tone Output
GUID-44C51882-FC29-4D59-834F-EFED753D23C1-low.png
VVLNB = 18.2 V
Figure 8-11 950-mA Load, 22-kHz Tone Output
GUID-709FC9AE-27C3-4E62-AA42-AFEB3E348BC7-low.png
Figure 8-13 No load, 22-kHz Tone Delay from EXTM 22-kHz Input Turns Low to Output Tone Off
GUID-992F605C-560B-4A45-9A80-46DD7049B707-low.png
Figure 8-15 No Load, 22-kHz Tone Delay from EXTM Tone Envelop Input Turns Low to Output Tone Off
GUID-B1916F90-761E-4B7B-B776-86745E5B26E4-low.png
Figure 8-17 No Load, 44-kHz Tone Delay from EXTM 22-kHz Input Turns Low to Output Tone Off