SLUSDQ8D december 2019 – may 2023 TPS652353
PRODUCTION DATA
I2C is a 2-wire serial interface developed by Philips Semiconductor (see I2C-Bus Specification, Version 2.1, January 2000). The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high external. All the I2C compatible devices connect to the I2C bus through open drain I/O pins, SDA and SCL. A controller device, usually a microcontroller (MCU) or a digital signal processor (DSP), controls the bus. The controller device is responsible for generating the SCL signal and device addresses. The controller device also generates specific conditions that indicate the START and STOP of data transfer. A target device receives, transmits data, or both on the bus under control of the controller device.
The TPS652353 device works as a target and supports the following data transfer modes, as defined in the I2CBus Specification: standard mode (100 kbps), and fast mode (400 kbps). The interface adds flexibility to the power supply solution, enabling most functions to be programmed to new values depending on the instantaneous application requirements. Register contents remain intact as long as supply voltage remains above 4.5 V (typical).
The data transfer protocol for standard and fast modes is exactly the same; therefore, they are referred to as F/S-mode in this document. The TPS652353 device supports 7-bit addressing; 10-bit addressing and general call address are not supported.
The TPS652353 device has a 7-bit address set by ADDR pin. Table 7-4 shows how to set the I2C address.
ADDR PIN | I2C ADDRESS | ADDRESS FORMAT (A6 ≥ A0) |
---|---|---|
Connect to VCC | 0x08 | 000 1000b |
Floating | 0x09 | 000 1001b |
Connected to GND | 0x10 | 001 0000b |
Resistor divider to make ADDR pin voltage in 3.7 V - 5.9 V | 0x11 | 001 0001b |