SLUSDQ8D december   2019  – may 2023 TPS652353

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Boost Converter
      2. 7.3.2  Linear Regulator and Current Limit
      3. 7.3.3  Boost Converter Current Limit
      4. 7.3.4  Charge Pump
      5. 7.3.5  Slew Rate Control
      6. 7.3.6  Short Circuit Protection, Hiccup and Overtemperature Protection
      7. 7.3.7  Tone Generation
      8. 7.3.8  Tone Detection
      9. 7.3.9  Audio Noise Rejection
      10. 7.3.10 Disable and Enable
      11. 7.3.11 Component Selection
        1. 7.3.11.1 Boost Inductor
        2. 7.3.11.2 Capacitor Selection
        3. 7.3.11.3 Surge Components
        4. 7.3.11.4 Consideration for Boost Filtering and LNB Noise
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 TPS652353 I2C Update Sequence
    6. 7.6 Register Maps
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DiSEqc1.x Support
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DiSEqc2.x Support
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Serial Interface Description

I2C is a 2-wire serial interface developed by Philips Semiconductor (see I2C-Bus Specification, Version 2.1, January 2000). The bus consists of a data line (SDA) and a clock line (SCL) with pullup structures. When the bus is idle, both SDA and SCL lines are pulled high external. All the I2C compatible devices connect to the I2C bus through open drain I/O pins, SDA and SCL. A controller device, usually a microcontroller (MCU) or a digital signal processor (DSP), controls the bus. The controller device is responsible for generating the SCL signal and device addresses. The controller device also generates specific conditions that indicate the START and STOP of data transfer. A target device receives, transmits data, or both on the bus under control of the controller device.

The TPS652353 device works as a target and supports the following data transfer modes, as defined in the I2CBus Specification: standard mode (100 kbps), and fast mode (400 kbps). The interface adds flexibility to the power supply solution, enabling most functions to be programmed to new values depending on the instantaneous application requirements. Register contents remain intact as long as supply voltage remains above 4.5 V (typical).

The data transfer protocol for standard and fast modes is exactly the same; therefore, they are referred to as F/S-mode in this document. The TPS652353 device supports 7-bit addressing; 10-bit addressing and general call address are not supported.

The TPS652353 device has a 7-bit address set by ADDR pin. Table 7-4 shows how to set the I2C address.

Table 7-4 I2C Address Selection
ADDR PIN I2C ADDRESS ADDRESS FORMAT (A6 ≥ A0)
Connect to VCC 0x08 000 1000b
Floating 0x09 000 1001b
Connected to GND 0x10 001 0000b
Resistor divider to make ADDR pin voltage in 3.7 V - 5.9 V 0x11 001 0001b
GUID-4791D725-E271-4A87-AE9A-EAA99C7A24A8-low.gif Figure 7-9 I2C Interface Timing Diagram