SLVSC70B January   2015  – January 2022 TPS65251-1 , TPS65251-2 , TPS65251-3

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics for Buck 1
    7. 6.7 Typical Characteristics for Buck 2
    8. 6.8 Typical Characteristics for Buck 3
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjustable Switching Frequency
      2. 7.3.2  Synchronization
      3. 7.3.3  Out-of-Phase Operation
      4. 7.3.4  Delayed Start-Up
      5. 7.3.5  Soft-Start Time
      6. 7.3.6  Adjusting the Output Voltage
      7. 7.3.7  Input Capacitor
      8. 7.3.8  Bootstrap Capacitor
      9. 7.3.9  Error Amplifier
      10. 7.3.10 Slope Compensation
      11. 7.3.11 Power Good
      12. 7.3.12 3.3-V and 6.5-V LDO Regulators
      13. 7.3.13 Current Limit Protection
      14. 7.3.14 Overvoltage Transient Protection (OVP)
      15. 7.3.15 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Low-Power/Pulse Skipping Operation
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Loop Compensation Circuit
        2. 8.2.2.2  Selecting the Switching Frequency
        3. 8.2.2.3  Output Inductor Selection
        4. 8.2.2.4  Output Capacitor
        5. 8.2.2.5  Input Capacitor
        6. 8.2.2.6  Soft-Start Capacitor
        7. 8.2.2.7  Bootstrap Capacitor Selection
        8. 8.2.2.8  Adjustable Current Limiting Resistor Selection
        9. 8.2.2.9  Output Voltage and Feedback Resistors Selection
        10. 8.2.2.10 Compensation
        11. 8.2.2.11 3.3-V and 6.5-V LDO Regulators
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.5 Input Capacitor

A minimum 10-µF X7R/X5R ceramic input capacitor is recommended to be added between VIN and GND. These capacitors should be connected as close as physically possible to the input pins of the converters as they handle the RMS ripple current shown in Equation 21. For this example, IOUT = 3 A, VOUT = 1.2 V, VINmin = 9.6 V, from Equation 21, the input capacitors must support a ripple current of 0.99 A RMS.

Equation 21. GUID-EE28FF83-5C9C-4F9B-8FF4-027E9BA85CE0-low.gif

The input capacitance value determines the input ripple voltage of the regulator. The input voltage ripple can be calculated using Equation 22. Using the design example values, IOUTmax = 3 A, CIN = 10 µF, fSW = 500 kHz, yields an input voltage ripple of 150 mV.

Equation 22. GUID-FF352E65-319D-4E23-963E-724F52E95384-low.gif