SLVSCN5B
june 2014 – may 2023
TPS65262-1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Adjusting the Output Voltage
8.3.2
Enable and Adjusting UVLO
8.3.3
Soft-Start Time
8.3.4
Power-Up Sequencing
8.3.4.1
External Power Sequencing
8.3.4.2
Automatic Power Sequencing
8.3.5
V7V Low Dropout Regulator and Bootstrap
8.3.6
Out-of-Phase Operation
8.3.7
Output Overvoltage Protection (OVP)
8.3.8
PSM
8.3.9
Slope Compensation
8.3.10
Overcurrent Protection (OCP)
8.3.10.1
High-Side MOSFET OCP
8.3.10.2
Low-Side MOSFET OCP
8.3.11
Power Good
8.3.12
Thermal Shutdown
8.4
Device Functional Modes
8.4.1
Operation With VIN < 4.5 V (Minimum VIN)
8.4.2
Operation With EN Control
8.4.3
Operation at Light Loads
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Output Inductor Selection
9.2.2.2
Output Capacitor Selection
9.2.2.3
Input Capacitor Selection
9.2.2.4
Loop Compensation
9.2.3
Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
10
Device and Documentation Support
10.1
Receiving Notification of Documentation Updates
10.2
Support Resources
10.3
Trademarks
10.4
Electrostatic Discharge Caution
10.5
Glossary
11
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
RHB|32
QFND029X
Orderable Information
slvscn5b_oa
slvscn5b_pm
8.2
Functional Block Diagram