SLVSCN5B june   2014  – may 2023 TPS65262-1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjusting the Output Voltage
      2. 8.3.2  Enable and Adjusting UVLO
      3. 8.3.3  Soft-Start Time
      4. 8.3.4  Power-Up Sequencing
        1. 8.3.4.1 External Power Sequencing
        2. 8.3.4.2 Automatic Power Sequencing
      5. 8.3.5  V7V Low Dropout Regulator and Bootstrap
      6. 8.3.6  Out-of-Phase Operation
      7. 8.3.7  Output Overvoltage Protection (OVP)
      8. 8.3.8  PSM
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Overcurrent Protection (OCP)
        1. 8.3.10.1 High-Side MOSFET OCP
        2. 8.3.10.2 Low-Side MOSFET OCP
      11. 8.3.11 Power Good
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Operation With VIN < 4.5 V (Minimum VIN)
      2. 8.4.2 Operation With EN Control
      3. 8.4.3 Operation at Light Loads
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Loop Compensation
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Typical Characteristics

TA = 25°C, VIN = 12 V, VOUT1= 1.2 V, VOUT2= 1.8 V, VOUT3= 3.3 V FSW = 600 kHz (unless otherwise noted)

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Figure 7-1 BUCK1 Efficiency
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Figure 7-3 BUCK1, Load Regulation
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Figure 7-5 BUCK3, Load Regulation
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Figure 7-7 BUCK2, Line Regulation
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Figure 7-9 LDO1, Load Regulation
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Figure 7-11 LDO1, Line Regulation
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Figure 7-13 Voltage Reference vs Temperature
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Figure 7-15 Shutdown Quiescent Current vs Temperature
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Figure 7-17 EN Pin Pullup Current vs Temperature, EN = 1.5 V
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Figure 7-19 EN Pin Threshold Falling vs Temperature
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Figure 7-21 Buck1 High-Side Current Limit vs Temperature
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Figure 7-23 LDO Current Limit vs Temperature
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Figure 7-2 BUCK2 Efficiency
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Figure 7-4 BUCK2, Load Regulation
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Figure 7-6 BUCK1, Line Regulation
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Figure 7-8 BUCK3, Line Regulation
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Figure 7-10 LDO2, Load Regulation
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Figure 7-12 LDO2, Line Regulation
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Figure 7-14 Oscillator Frequency vs Temperature
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Figure 7-16 EN Pin Pullup Current vs Temperature, EN = 1 V
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Figure 7-18 EN Pin Threshold Rising vs Temperature
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Figure 7-20 SS Pin Charge Current vs Temperature
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Figure 7-22 Buck2, 3 High-Side Current Limit vs Temperature
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Figure 7-24 LDO2 Current Limit vs Temperature