SLVSDY9A March   2017  – November 2022 TPS65263-1Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting UVLO
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low-Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  PSM
      9. 7.3.9  Slope Compensation
      10. 7.3.10 Overcurrent Protection
        1. 7.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 7.3.11 Power Good
        1. 7.3.11.1 Adjustable Switching Frequency
      12. 7.3.12 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Serial Interface Description
      2. 7.4.2 I2C Update Sequence
    5. 7.5 Register Maps
      1. 7.5.1 VOUT2_SEL: Vout2 Voltage Selection Register (Address = 0x01H)
      2. 7.5.2 VOUT1_COM: Buck1 Command Register (offset = 0x03H)
      3. 7.5.3 VOUT2_COM: Buck2 Command Register (offset = 0x04H)
      4. 7.5.4 VOUT3_COM: Buck3 Command Register (offset = 0x05H)
      5. 7.5.5 SYS_STATUS: System Status Register (offset = 0x06H)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.1 Absolute Maximum Ratings

over operating free-air temperature (unless otherwise noted) (1)
MINMAXUNIT
PVIN1, PVIN2, PVIN3,VIN–0.320V
LX1, LX2, LX3 (Maximum withstand voltage transient < 20 ns)–120V
BST1, BST2, BST3 referenced to LX1, LX2, LX3 pins respectively–0.37V
EN1, EN2, EN3, V7V, VOUT2, SCL, SDA, PGOOD–0.37V
FB1, FB2, FB3, COMP1 , COMP2, COMP3, ROSC, SS1, SS2, SS3–0.33.6V
AGND, PGND1, PGND2, PGND3–0.30.3V
TJOperating junction temperature–40150°C
TstgStorage temperature–55150°C
(1) Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods can affect device reliability.