SLVSCS9D december 2014 – may 2023 TPS65263-Q1
PRODUCTION DATA
The PGOOD pin is an open-drain output. When feedback voltage of each buck is between 95% (rising) and 105% (falling) of the internal voltage reference, the PGOOD pin pulldown is deasserted and the pin floats. TI recommends to use a pullup resistor between the values of 10 and 100 kΩ to a voltage source that is 5.5 V or less. The PGOOD is in a defined state when the VIN input voltage is greater than 1 V, but with reduced current sinking capability. The PGOOD achieves full current sinking capability after the VIN input voltage is above UVLO threshold, which is 3.8 V.
The PGOOD pin is pulled low when any feedback voltage of buck is lower than 92.5% (falling) or greater than 107.5% (rising) of the nominal internal reference voltage. Also, when the PGOOD is pulled low, if the input voltage is undervoltage locked up, thermal shutdown is asserted, the EN pin is pulled low or the converter is in soft-start period.
The power-good indicator for each buck channel can be read back through I2C. The bits in SYS_STATUS[2:0] (address 0x06H) present the feedback voltage in regulation (logic 1) or not (logic 0) for buck1, buck2, and buck3 respectively