SLVSCN0C june   2014  – may 2023 TPS65263

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjusting the Output Voltage
      2. 8.3.2  Enable and Adjusting UVLO
      3. 8.3.3  Soft-Start Time
      4. 8.3.4  Power-Up Sequencing
      5. 8.3.5  V7V Low Dropout Regulator and Bootstrap
      6. 8.3.6  Out-of-Phase Operation
      7. 8.3.7  Output Overvoltage Protection (OVP)
      8. 8.3.8  Pulse Skipping Mode (PSM)
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Overcurrent Protection
        1. 8.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 8.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 8.3.11 Power Good
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Serial Interface Description
      2. 8.4.2 I2C Update Sequence
    5. 8.5 Register Maps
      1. 8.5.1 Register Description
      2. 8.5.2 VOUT1_SEL: Vout1 Voltage Selection Register (offset = 0x00H)
      3. 8.5.3 VOUT2_SEL: Vout2 Voltage Selection Register (offset = 0x01H)
      4. 8.5.4 VOUT3_SEL: Vout3 Voltage Selection Register (offset = 0x02H)
      5. 8.5.5 VOUT1_COM: Buck1 Command Register (offset = 0x03H)
      6. 8.5.6 VOUT2_COM: Buck2 Command Register (offset = 0x04H)
      7. 8.5.7 VOUT3_COM: Buck3 Command Register (offset = 0x05H)
      8. 8.5.8 SYS_STATUS: System Status Register (offset = 0x06H)
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Loop Compensation
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Adjusting the Output Voltage

The output voltage of each buck is set with a resistor divider from the output of buck to the FB pin. TI recommends to use 1% tolerance or better resistors.

GUID-2A552990-8A0E-4F3C-B70B-BC0DEAB9474E-low.gif Figure 8-1 Voltage Divider Circuit
Equation 1. GUID-060D0AE0-D105-450D-B682-D63F381294B3-low.gif

To improve efficiency at light loads consider using larger value resistors. If the values are too high, the regulator is more sensitive to noise. The recommended resistor values are shown in Table 8-1.

Table 8-1 Output Resistor Divider Selection
OUTPUT VOLTAGE
(V)
R1
(kΩ)
R2
(kΩ)
11015
1.21010
1.51510
1.82010
2.531.610
3.345.310
3.322.64.99
573.210
536.54.99

The output voltage of buck converter can be dynamically scaled by I2C controlled 7-bit register VOUTx_SEL. Before I2C communication, the output voltage is set with the resistor divider from the output of buck to the FB pin. When GO bit is set to 1 through I2C interface, the buck converter switches external resistor divider to the internal resistor divider as shown in Figure 8-2. The output voltage can be selected among 128 voltages with voltage identifications (VID) shown in Table 8-2. The output voltage range of dynamic voltage scaling is 0.68 to 1.95 V with 10-mV resolution of each voltage step.

GUID-20230504-SS0I-X7WN-62BL-R27D8W3FPRF4-low.svg Figure 8-2 Voltage Divider Circuit
Table 8-2 Vout Output Voltage Setting
OUT_SEL
<7:0>
VOUT
(V)
VOUT_SEL
<7:0>
VOUT
(V)
VOUT_SEL
<7:0>
VOUT
(V)
VOUT_SEL
<7:0>
VOUT
(V)
00.68201401.32601.64
10.69211.01411.33611.65
20.7221.02421.34621.66
30.71231.03431.35631.67
40.72241.04441.36641.68
50.73251.05451.37651.69
60.74261.06461.38661.7
70.75271.07471.39671.71
80.76281.08481.4681.72
90.77291.09491.41691.73
A0.782A1.14A1.426A1.74
B0.792B1.114B1.436B1.75
C0.82C1.124C1.446C1.76
D0.812D1.134D1.456D1.77
E0.822E1.144E1.466E1.78
F0.832F1.154F1.476F1.79
100.84301.16501.48701.8
110.85311.17511.49711.81
120.86321.18521.5721.82
130.87331.19531.51731.83
140.88341.2541.52741.84
150.89351.21551.53751.85
160.9361.22561.54761.86
170.91371.23571.55771.87
180.92381.24581.56781.88
190.93391.25591.57791.89
1A0.943A1.265A1.587A1.9
1B0.953B1.275B1.597B1.91
1C0.963C1.285C1.67C1.92
1D0.973D1.295D1.617D1.93
1E0.983E1.35E1.627E1.94
1F0.993F1.315F1.637F1.95