SLVSD86B december 2015 – may 2023 TPS65265
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
INPUT SUPPLY VOLTAGE | ||||||
VIN | Input voltage range | 4.5 | 17 | V | ||
UVLO | VIN undervoltage lockout | VIN rising | 3.6 | 3.8 | 4 | V |
VIN falling | 3.0 | 3.2 | 3.4 | V | ||
Hysteresis | 600 | mV | ||||
IDDSDN | Shutdown supply current | PVIN = 12 V, EN1 = EN2 = EN3 = MODE = 0 V | 9 | 11.5 | 14 | µA |
IDDQ_NSW | Input quiescent current without buck1/2/3 switching | EN1 = EN2 = EN3 = 5 V, FB1 = FB2 = FB3 = 0.8 V | 550 | 680 | 800 | µA |
IDDQ_NSW1 | EN1 = 5 V, EN2 = EN3 = 0 V, FB1 = 0.8 V | 280 | 350 | 425 | µA | |
IDDQ_NSW2 | EN2 = 5 V, EN1 = EN3 = 0 V, FB2 = 0.8 V | 280 | 350 | 425 | µA | |
IDDQ_NSW3 | EN3 = 5 V, EN1 = EN2 = 0 V, FB3 = 0.8 V | 280 | 350 | 425 | µA | |
V7V | V7V LDO output voltage | PVIN1 = 12 V, V7V load current = 0 A | 5.9 | 6.1 | 6.3 | V |
IOCP_V7V | V7V LDO current limit | 110 | 177 | 235 | mA | |
FEEDBACK VOLTAGE REFERENCE | ||||||
VFB | Feedback voltage | VCOMP = 1.2 V | 0.592 | 0.6 | 0.608 | V |
Buck1, Buck2, Buck3 | ||||||
VENXH | EN1/2/3 high-level input voltage | 1.08 | 1.15 | 1.22 | V | |
VENXL | EN1/2/3 low-level input voltage | 1.06 | 1.12 | 1.17 | V | |
IENX1 | EN1/2/3 pullup current | ENx = 1 V | 2.3 | 2.9 | 3.4 | µA |
IENX2 | EN1/2/3 pullup current | ENx = 1.5 V | 5.1 | 6 | 6.8 | µA |
IENhys | hysteresis current | 3.1 | µA | |||
tON_MIN | Minimum on time | Iload = 100 mA | 75 | 120 | ns | |
Gm_EA | Error amplifier transconductance | –2 µA < ICOMPX < 2 µA | 174 | 350 | 530 | µS |
Gm_PS1/2/3 | COMP1/2/3 voltage to inductor current Gm(1) | ILX = 0.5 A | 12 | A/V | ||
ILIMIT1 | buck1 peak inductor current limit | 6.0 | 8.0 | 9.6 | A | |
ILIMITSOURCE1 | buck1 low-side source current limit | 5.3 | 7.7 | 10 | A | |
ILIMITSINK1 | buck1 low-side sink current limit | 1.4 | A | |||
ILIMIT2 | buck2 peak inductor current limit | 3.85 | 5.2 | 6.65 | A | |
ILIMITSOURCE2 | buck2 low-side source current limit | 3 | 4.8 | 5.5 | A | |
ILIMITSINK2 | buck2 low-side sink current limit | 1.2 | A | |||
ILIMIT3 | buck3 peak inductor current limit | 2.6 | 3.6 | 4.45 | A | |
ILIMITSOURCE3 | buck3 low-side source current limit | 2.6 | 3.7 | 4.6 | A | |
ILIMITSINK3 | buck3 low-side sink current limit | 1.2 | A | |||
tHiccup_wait | Overcurrent wait time(1) | 256 | cycles | |||
tHiccup_re | Hiccup time before restart(1) | 8192 | cycles | |||
Rdson_HS1 | buck1 high-side switch resistance | PVIN = 12 V | 39 | mΩ | ||
Rdson_LS1 | buck1 low-side switch resistance | PVIN = 12 V | 25 | mΩ | ||
Rdson_HS2 | buck2 high-side switch resistance | PVIN = 12 V | 52 | mΩ | ||
Rdson_LS2 | buck2 low-side switch resistance | PVIN = 12 V | 43 | mΩ | ||
Rdson_HS3 | buck3 high-side switch resistance | PVIN = 12 V | 70 | mΩ | ||
Rdson_LS3 | buck3 low-side switch resistance | PVIN = 12 V | 65 | mΩ | ||
PGOOD, MODE, PSM, SEQ_DLY, PG_DLY | ||||||
Vth_PG | Feedback voltage threshold | FBx undervoltage falling | 92.5 | %VREF | ||
FBx undervoltage rising | 95 | %VREF | ||||
FBx overvoltage rising | 107.5 | %VREF | ||||
FBx overvoltage falling | 105 | %VREF | ||||
tDEGLITCH(PG)_F | PGOOD falling edge deglitch time | 256 | cycles | |||
tDEGLITCH(PG)_R | PGOOD rising edge deglitch time | 256 | cycles | |||
IPG | PGOOD pin leakage | 0.08 | µA | |||
VLOW_PG | PGOOD pin low voltage | PVIN1 = 12 V, ISINK = 1 mA | 0.25 | V | ||
VMODE_H | MODE high level input voltage | 2.4 | 2.6 | 2.8 | V | |
VMODE_L | MODE low level input voltage | 0.11 | 0.16 | 0.23 | V | |
VPG_DLYTH | PG_DLY threshold | 1.4 | 1.5 | 1.6 | V | |
IPG_DLY | PG_DLY pullup current | PG_DLY = 0.5 V | 2.0 | 3.0 | 4.1 | µA |
VSEQ_DLYTH1 | SEQ_DLY threshold | 0.7 | 0.75 | 0.8 | V | |
VSEQ_DLYTH2 | SEQ_DLY threshold | 1.4 | 1.5 | 1.58 | V | |
ISEQ_DLY | SEQ_DLY pullup current | SEQ_DLY = 0.5 V | 2 | 3 | 4.1 | µA |
VPSMH | PSM pin high level input voltage | 1.3 | 1.4 | 1.55 | V | |
VPSML | PSM pin low level input voltage | 1 | 1.1 | 1.2 | V | |
OSCILLATOR | ||||||
FSW | Switching frequency | ROSC = 82.5 kΩ | 580 | 610 | 640 | kHz |
FSW_range | Switching frequency | 250 | 2300 | kHz | ||
tSYNC_w | Clock sync minimum pulse width | 80 | ns | |||
FSYNC_HI | Clock sync high threshold | 2 | V | |||
VSYNC_LO | Clock sync low threshold | 0.4 | V | |||
THERMAL PROTECTION | ||||||
TTRIP_OTP | Thermal protection trip point(1) | Temperature rising | 160 | °C | ||
THYST_OTP | Hysteresis | 20 | °C |