SLVSE48C january   2018  – may 2023 TPS65268-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting UVLO
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low-Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Overcurrent Protection
        1. 7.3.9.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.9.2 Low-Side MOSFET Overcurrent Protection
      10. 7.3.10 Power Good
        1. 7.3.10.1 Adjustable Switching Frequency
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Standby Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Soft-Start Time

The voltage on the respective SSx pin controls the startup of buck output. When the voltage on the SSx pin is less than the internal 0.6-V reference, the TPS65268-Q1 device regulates the internal feedback voltage to the voltage on the SSx pin instead of 0.6 V. The SSx pin can be used to program an external soft-start function or to allow the output of buck converter to track another supply during start-up. The device has an internal pullup current source of 5.2 µA (typical) that charges an external soft-start capacitor to provide a linear ramping voltage at the SSx pin. The TPS65268-Q1 device regulates the internal feedback voltage to the voltage on the SSx pin, allowing the output voltage to rise smoothly from 0 V to the regulated voltage of the pin without inrush current. Use Equation 4 to calculate the approximate soft-start time.

Equation 4. GUID-BD4DABD3-A028-4AB7-8C37-393F8CA88085-low.gif

where

  • tSS is the soft-start time
  • CSS is the soft-start capacitance
  • ISS is the soft-start current
  • Vref is the reference voltage

Many of the common power-supply sequencing methods can be implemented using the SSx and ENx pins. Figure 7-5 shows the method implementing ratiometric sequencing by connecting the SSx pins of the three buck channels. The regulator outputs ramp up and reach regulation at the same time. When calculating the soft-start time, the pullup current source must be tripled in Equation 4.

GUID-C8234DD5-413C-4855-8B6B-AEFF8AA5658C-low.gifFigure 7-5 Ratiometric Power-Up Using SSx Pins

The user can implement simultaneous power-supply sequencing by connecting the capacitor to the SSx pin, shown in Figure 7-6. Use Equation 4 and Equation 5 to calculate the value of the capacitors.

Equation 5. GUID-6CE6E96F-4EDC-4EE6-9BB4-62E9BCC94922-low.gif
GUID-960AC29C-658F-4A20-BB5B-ED68010230BC-low.gifFigure 7-6 Simultaneous Startup Sequence Using SSx Pins