SLVSE48C january   2018  – may 2023 TPS65268-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Enable and Adjusting UVLO
      3. 7.3.3  Soft-Start Time
      4. 7.3.4  Power-Up Sequencing
      5. 7.3.5  V7V Low-Dropout Regulator and Bootstrap
      6. 7.3.6  Out-of-Phase Operation
      7. 7.3.7  Output Overvoltage Protection (OVP)
      8. 7.3.8  Slope Compensation
      9. 7.3.9  Overcurrent Protection
        1. 7.3.9.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.9.2 Low-Side MOSFET Overcurrent Protection
      10. 7.3.10 Power Good
        1. 7.3.10.1 Adjustable Switching Frequency
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Standby Operation
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Inductor Selection
        2. 8.2.2.2 Output Capacitor Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Loop Compensation
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Thermal Information

THERMAL METRIC(1)TPS65268-Q1UNIT
RHB (VQFN)
32 PINS
RθJAJunction-to-ambient thermal resistance33.3°C/W
RθJC(top)Junction-to-case (top) thermal resistance25.7°C/W
RθJBJunction-to-board thermal resistance7.4°C/W
ψJTJunction-to-top characterization parameter0.3°C/W
ψJBJunction-to-board characterization parameter7.3°C/W
RθJC(bot)Junction-to-case (bottom) thermal resistance2.1°C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.