SLVSCL3E June   2014  – May 2019 TPS65283 , TPS65283-1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Schematic
    1.     Efficiency, Vin = 12 V, PSM
  5. 5 Revision History
  6. 6 Description (continued)
  7. 7 Pin Configuration and Functions
    1.     Pin Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 Handling Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Power Switch Detailed Description
        1. 9.3.1.1 Overcurrent Condition
        2. 9.3.1.2 Reverse Current and Voltage Protection
        3. 9.3.1.3 nFAULT Response
        4. 9.3.1.4 UVLO
        5. 9.3.1.5 Enable and Output Discharge
        6. 9.3.1.6 Power Switch Input and Output Capacitance
        7. 9.3.1.7 Programming the Current-Limit Threshold
      2. 9.3.2 Buck DC-DC Converter Detailed Description
        1. 9.3.2.1  Output Voltage
        2. 9.3.2.2  Adjustable Switching Frequency
        3. 9.3.2.3  Synchronization
        4. 9.3.2.4  Error Amplifier
        5. 9.3.2.5  Slope Compensation
        6. 9.3.2.6  Enable and Adjusting UVLO
        7. 9.3.2.7  Internal V7V Regulator
        8. 9.3.2.8  Short Circuit Protection
          1. 9.3.2.8.1 High-Side MOSFET Overcurrent Protection
          2. 9.3.2.8.2 Low-Side MOSFET Overcurrent Protection
        9. 9.3.2.9  Bootstrap Voltage (BST) and Low Dropout Operation
        10. 9.3.2.10 Output Overvoltage Protection (OVP)
        11. 9.3.2.11 Power Good
        12. 9.3.2.12 Power-Up Sequencing
        13. 9.3.2.13 Thermal Performance
    4. 9.4 Device Functional Modes
      1. 9.4.1 Operation With VIN < 4.5 V (Minimum VIN)
      2. 9.4.2 Operation With EN Control
      3. 9.4.3 Operation at Light Loads
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Output Voltage Setting
        2. 10.2.2.2 Bootstrap Capacitor Selection
        3. 10.2.2.3 Inductor Selection
        4. 10.2.2.4 Output Capacitor Selection
        5. 10.2.2.5 Input Capacitor Selection
        6. 10.2.2.6 Minimum Output Voltage
        7. 10.2.2.7 Compensation Component Selection
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 PCB Layout Recommendation
      2. 12.1.2 Power Dissipation and Junction Temperature
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.1.1 Overcurrent Condition

The TPS65283, TPS65283-1 responds to overcurrent conditions on power switches by limiting the output currents to IOCP_SW level, which is set by external resistor. When the load current is less than the current-limit threshold, the devices are not limiting current. During normal operation, the N-channel MOSFET is fully enhanced, and VSW_OUT = VSW_IN – (ISW_OUT × Rdson_SW). The voltage drop across the MOSFET is relatively small compared to VSW_IN, and VSW_OUT ≈ VSW_IN. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. During current-limit operation, the N-channel MOSFET is no longer fully enhanced and the resistance of the device increases. This allows the device to effectively regulate the current to the current-limit threshold. The effect of increasing the resistance of the MOSFET is that the voltage drop across the device is no longer negligible (VSW_IN ≠ VSW_OUT), and VSW_OUT decreases. The amount that VSW_OUT decreases is proportional to the magnitude of the overload condition. The expected VSW_OUT can be calculated by IOCP_SW × RLOAD, where IOCP_SW is the current-limit threshold and RLOAD is the magnitude of the overload condition.

Table 1 shows three possible overload conditions that can occur.

Table 1. Overload Conditions

CONDITIONS BEHAVIORS
Short circuit or partial short circuit present when the device is powered up or enabled The output voltage is held near zero potential with respect to ground and the TPS65283, TPS65283-1 ramps output current to IOCP_SW. The device limits the current to IOS until the overload condition is removed or the internal deglitch time (8 ms typical) is reached and the device is turned off. The device auto recovers when the overcurrent status is removed.
Gradually increasing load (<100 A/s) from normal operating current to IOCP_SW The current rises until current limit. After the threshold has been reached, the device switches into its current limiting at IOCP_SW. The device limits the current to IOS until the overload condition is removed or the internal deglitch time (8 ms typical) is reached and the device is turned off. The device auto recovers when the overcurrent status is removed.
Short circuit, partial short circuit or fast transient overload occurs while the device is enabled and powered on The device responds to the overcurrent condition within time TIOS (see Figure 3).The current sensing amplifier is overdriven during this time, and needs time for loop response. After TIOS has passed, the current sensing amplifier recovers and limits the current to IOCP_SW. The device limits the current to IOS until the overload condition is removed or the internal deglitch time (8 ms typical) is reached and the device is turned off. The device auto recovers when the overcurrent status is removed.